S. Demuynck

2.6k citations

101 papers · 1.2k indexed · h-index 18

Impact in

Electrical and Electronic Engineering top 5%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Ferroelectric and Negative Capacitance Devices
- Advancements in Photolithography Techniques
Electronic, Optical and Magnetic Materials top 10%
- Copper Interconnects and Reliability

Papers in

Electronic, Optical and Magnetic Materials 41
- Copper Interconnects and Reliability 32
Electrical and Electronic Engineering 79
- Semiconductor materials and devices 61
- Advancements in Semiconductor Devices and Circuit Design 35
- Integrated Circuits and Semiconductor Failure Analysis 27
- Advancements in Photolithography Techniques 14

Co-authors: Naoto Horiguchi G. Groeseneken A. Mocuta M. Rots Johan Meersschaut Stefaan Cottenier Zs. Tôkei A. Nackaerts
Journals: Microelectronic Engineering (5 papers)Journal of Magnetism and Magnetic Materials (4 papers)Japanese Journal of Applied Physics (3 papers)IEEE Transactions on Electron Devices (3 papers)Physical Review Letters (3 papers)
Partner nations: Belgium United States Netherlands

In The Last Decade

S. Demuynck

97 papers receiving 1.2k citations

Peers

Countries citing papers authored by S. Demuynck

Since Specialization

Citations

This map shows the geographic impact of S. Demuynck's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Demuynck with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Demuynck more than expected).

Fields of papers citing papers by S. Demuynck

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Demuynck. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Demuynck. The network helps show where S. Demuynck may publish in the future.

Co-authors

The 25 scholars most cited alongside S. Demuynck, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with S. Demuynck Line = papers co-authored together S. Demuynck links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Lithography strategies on overlay control of backside processing in complementary field effect transistor (CFET) device Rajendra K. Saroj, A. Mingardi, Sujan K. Sarkar, Teresa Rodrigues, Koen D’havé, A. Vandooren, Cassie Sheng, Karen Stiers, C. Cavalcante, S. Demuynck, Naoto Horiguchi, S. Biesemans, Luís Felipe Ferreira Motta Barbosa, Mircea Dusa, Sandip Halder	2025	0
2	Source/Drain Epitaxy for Nanosheet-Based CFET Devices ECS Transactions ·Erik Rosseel, Clément Porret, Thomas Dursap, Roger Loo, Hans Mertens, Jishnu Ganguly, Ritam Sarkar, Camila Cavalcante, Olivier Richard, J. Geypen, Brendan Marozas, Daniel Casey, Rami Khazaka, S. Demuynck, Lucas Petersen Barbosa Lima, R. Langer, S. Biesemans, Naoto Horiguchi	2024	2
3	Source/Drain Epitaxy for Nanosheet-Based CFET Devices ECS Meeting Abstracts ·Erik Rosseel, Clément Porret, Thomas Dursap, Roger Loo, Hans Mertens, Jishnu Ganguly, Ritam Sarkar, Camila Cavalcante, Olivier Richard, J. Geypen, Brendan Marozas, Daniel Casey, Rami Khazaka, S. Demuynck, Lucas Petersen Barbosa Lima, R. Langer, S. Biesemans, Naoto Horiguchi	2024	0
4	Patterning spacer source drain cavities in CFET devices Subhobroto Choudhury, G. Mannaert, Lucas Petersen Barbosa Lima, S. Demuynck, Il Gyo Koo, Frédéric Lazzarino	2024	1
5	3D stacked devices and MOL innovations for post-Nanosheet CMOS scaling S. Demuynck, Victor Vega Gonzalez, C. Toledo, Karen Stiers, Cassie Sheng, Andy Peng, Dmitry Batuk, Maryam Hosseini, A. Vandooren, Lucas Petersen Barbosa Lima, Naoto Horiguchi, S. Biesemans	2024	0
6	Challenges for spacer and source/drain cavity patterning in CFET devices G. Mannaert, Hans Mertens, Maryam Hosseini, S. Demuynck, Vy Thi Hoang Nguyen, Boon Teik Chan, Frédéric Lazzarino	2023	3
7	Process Variation Analysis of Device Performance Using Virtual Fabrication: Methodology Demonstrated on a CMOS 14-nm FinFET Vehicle IEEE Transactions on Electron Devices ·Benjamin Vincent, Raghu Hathwar, M. Kamon, Joseph Ervin, T. Schram, T. Chiarella, S. Demuynck, S. Baudot, Yong Kong Siew, S. Kubicek, E. Dentoni Litta, Soon-Aik Chew, Jérôme Mitard	2020	11
8	CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits Japanese Journal of Applied Physics ·E. Dentoni Litta, R. Ritzenthaler, T. Schram, A. Spessot, Barry O’Sullivan, Vladimir Machkaoutsan, P. Fazan, Yun-Hyuck Ji, G. Mannaert, Christophe Lorant, Farid Sebaai, Arame Thiam, Monique Ercken, S. Demuynck, Naoto Horiguchi	2018	4
9	The Complementary FET (CFET) for CMOS scaling beyond N3 Julien Ryckaert, P. Schuddinck, Pieter Weckx, G. Bouche, Benjamin Vincent, Jake Smith, Yasser Sherazi, A. Mallik, Hans Mertens, S. Demuynck, Trong Huynh-Bao, A. Veloso, Naoto Horiguchi, A. Mocuta, D. Mocuta, Juergen Boemmels	2018	147
10	Titanium Silicide on Si:P With Precontact Amorphization Implantation Treatment: Contact Resistivity Approaching $1 \times 10^{-9}$ Ohm-cm2 IEEE Transactions on Electron Devices ·Hao Yu, Marc Schaekers, A. Peter, Geoffrey Pourtois, Erik Rosseel, Joon-Gon Lee, Woo-Bin Song, Keo Myoung Shin, Jean-Luc Everaert, Soon Aik Chew, S. Demuynck, Dae-Yong Kim, Kathy Barla, A. Mocuta, Naoto Horiguchi, Aaron Thean, Nadine Collaert, K. De Meyer	2016	47
11	Process options to enable (sub-)1e-9 Ohm.cm2 contact resistivity on Si devices Hao Yu, Marc Schaekers, S. Demuynck, Erik Rosseel, J.-L. Everaert, Soon Aik Chew, A. Peter, Stefan Kubicek, K. Barla, A. Mocuta, Naoto Horiguchi, Nadine Collaert, Aaron Thean, K. De Meyer	2016	7
12	Cobalt bottom-up contact and via prefill enabling advanced logic and DRAM technologies Marleen H. van der Veen, K. Vandersmissen, Dries Dictus, S. Demuynck, R. Liu, Bin Xue, Pragnya Sudershan Nalla, A. Leśniewska, Lindsey Hall, Kristof Croes, Linlin Zhao, J. Bömmels, A. Kolics, Zs. Tôkei	2015	42
13	Contact module at dense gate pitch technology challenges S. Demuynck, Mengda Mao, E. Kunnen, Janko Versluijs, Kristof Croes, Chun-Yi Wu, Marc Schaekers, A. Peter, T. Kauerauf, Lieve Teugels, J. Bömmels	2014	4
14	Direct Copper Electrochemical Deposition on Ru-Based Substrates for Advanced Interconnects Target 30 nm and 1/2 Pitch Lines: From Coupon to Full-Wafer Experiments ECS Transactions ·Silvia Armini, S. Demuynck, Zaid El-Mekki, Johan Swerts, Magi Nagar, Alex Radisic, N. Heylen, Gerald Beyer, Leonardus H. A. Leunissen, Philippe M. Vereecken	2011	7
15	On the Reliability of Cu Contacts for the 32nm Technology Node and beyond T. Kauerauf, S. Demuynck, G. Butera, J. Bogan, Zs. Tôkei, G. Groeseneken	2009	2
16	Imaging performance of the EUV alpha semo tool at IMEC Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·Gian F. Lorusso, Jan Hermans, A. M. Goethals, Bart Baudemprez, Frieda Van Roey, Alan Myers, I. Kim, B. S. Kim, R. Jonckheere, Ardavan Niroomand, Sjoerd Lok, Andre van Dijk, Jean‐François de Marneffe, S. Demuynck, Danny Goossens, Kurt Ronse	2008	11
17	Dielectric Reliability of 50 nm 1/2 Pitch Structures in Aurora<sup>®</sup> LK S. Demuynck, H. G. Kim, C. Huffman, Maxime Darnon, Herbert Struyf, Janko Versluijs, Martine Claes, Guy Vereecke, P. Verdonck, Henny Volders, N. Heylen, Kristof Kellens, David De Roest, Hessel Sprey, Gerald Beyer	2008	1
18	An investigation of ultra low-k dielectrics with high thermal stability for integration in memory devices Microelectronic Engineering ·Eun Suk Hong, S. Demuynck, Quoc Toan Le, Mikhaı̈l R. Baklanov, L. Carbonell, M. Van Hove, H. Meynen	2007	3
19	Integration of Single Damascene 85/85 nm L/S copper trenches in Black Diamond using 193 nm optical lithography with dipole illumination J. Van Olmen, Wen‐Wei Wu, M. Van Hove, Youssef Travaly, Sywert Brongersma, B. Eyckens, Mireille Maenhoudt, J. Van Aelst, Herbert Struyf, S. Demuynck, Zs. Tôkei, I. Vervoort, B. Sijmus, Ingrid Vos, Ivan Ciofi, Michele Stucchi, Karen Maex, Francesca Iacopi	2004	1
20	Structural and Magnetic Ordering of Chromium inAg/CrMultilayers Physical Review Letters ·S. Demuynck, Johan Meersschaut, J. Dekoster, Bart Swinnen, R. Moons, A. Vantomme, Stefaan Cottenier, M. Rots	1998	28

About S. Demuynck

S. Demuynck is a scholar working on Electronic, Optical and Magnetic Materials, Electrical and Electronic Engineering, Condensed Matter Physics, Atomic and Molecular Physics, and Optics and Surfaces, Coatings and Films, having authored 101 papers that have together received 1.2k indexed citations. Recurring topics across this work include Semiconductor materials and devices (61 papers), Advancements in Semiconductor Devices and Circuit Design (35 papers), Copper Interconnects and Reliability (32 papers), Integrated Circuits and Semiconductor Failure Analysis (27 papers), Semiconductor materials and interfaces (17 papers), Advancements in Photolithography Techniques (14 papers), Magnetic properties of thin films (10 papers) and Rare-earth and actinide compounds (7 papers). The work is most often cited by research in Electrical and Electronic Engineering (985 citations), Electronic, Optical and Magnetic Materials (307 citations), Atomic and Molecular Physics, and Optics (360 citations), Condensed Matter Physics (95 citations) and Hardware and Architecture (32 citations). S. Demuynck has collaborated with scholars based in Belgium, United States and Netherlands. Frequent co-authors include Naoto Horiguchi, G. Groeseneken, A. Mocuta, M. Rots, Johan Meersschaut, Stefaan Cottenier, Zs. Tôkei, A. Nackaerts, B. Kaczer and R. Rodrı́guez. Their work appears in journals such as Microelectronic Engineering, Journal of Magnetism and Magnetic Materials, Japanese Journal of Applied Physics, IEEE Transactions on Electron Devices and Physical Review Letters.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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