S. Biesemans

4.5k total citations
171 papers, 2.5k citations indexed

About

S. Biesemans is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Biomedical Engineering. According to data from OpenAlex, S. Biesemans has authored 171 papers receiving a total of 2.5k indexed citations (citations by other indexed papers that have themselves been cited), including 167 papers in Electrical and Electronic Engineering, 40 papers in Atomic and Molecular Physics, and Optics and 9 papers in Biomedical Engineering. Recurrent topics in S. Biesemans's work include Semiconductor materials and devices (152 papers), Advancements in Semiconductor Devices and Circuit Design (124 papers) and Integrated Circuits and Semiconductor Failure Analysis (52 papers). S. Biesemans is often cited by papers focused on Semiconductor materials and devices (152 papers), Advancements in Semiconductor Devices and Circuit Design (124 papers) and Integrated Circuits and Semiconductor Failure Analysis (52 papers). S. Biesemans collaborates with scholars based in Belgium, United States and Netherlands. S. Biesemans's co-authors include Nadine Collaert, M. Jurczak, K. De Meyer, Sven Rogge, G. P. Lansbergen, J. Caro, Thomas Hoffmann, P. Absil, A. Veloso and R. Rooyackers and has published in prestigious journals such as Physical Review Letters, Applied Physics Letters and Journal of Applied Physics.

In The Last Decade

S. Biesemans

164 papers receiving 2.4k citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
S. Biesemans 2.4k 736 326 278 69 171 2.5k
J.C.S. Woo 2.5k 1.0× 717 1.0× 314 1.0× 401 1.4× 59 0.9× 112 2.6k
T. Ohguro 2.2k 0.9× 745 1.0× 326 1.0× 207 0.7× 59 0.9× 125 2.3k
T. Ghani 2.1k 0.9× 359 0.5× 447 1.4× 481 1.7× 110 1.6× 33 2.3k
Geert Eneman 3.1k 1.3× 509 0.7× 810 2.5× 283 1.0× 44 0.6× 225 3.2k
S. Deleonibus 2.8k 1.2× 430 0.6× 547 1.7× 384 1.4× 33 0.5× 217 2.9k
C.H. Diaz 2.1k 0.9× 235 0.3× 332 1.0× 192 0.7× 40 0.6× 109 2.2k
F. Balestra 3.5k 1.5× 384 0.5× 489 1.5× 366 1.3× 52 0.8× 206 3.7k
A. Veloso 2.0k 0.8× 557 0.8× 501 1.5× 287 1.0× 165 2.4× 219 2.3k
D.D. Tang 1.6k 0.7× 469 0.6× 172 0.5× 156 0.6× 96 1.4× 102 1.8k
Meishoku Masahara 2.4k 1.0× 200 0.3× 371 1.1× 204 0.7× 53 0.8× 232 2.5k

Countries citing papers authored by S. Biesemans

Since Specialization
Citations

This map shows the geographic impact of S. Biesemans's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Biesemans with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Biesemans more than expected).

Fields of papers citing papers by S. Biesemans

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Biesemans. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Biesemans. The network helps show where S. Biesemans may publish in the future.

Co-authorship network of co-authors of S. Biesemans

This figure shows the co-authorship network connecting the top 25 collaborators of S. Biesemans. A scholar is included among the top collaborators of S. Biesemans based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Biesemans. S. Biesemans is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
2.
Rosseel, Erik, Clément Porret, Roger Loo, et al.. (2024). Source/Drain Epitaxy for Nanosheet-Based CFET Devices. ECS Transactions. 114(2). 29–36. 2 indexed citations
3.
Rosseel, Erik, Clément Porret, Roger Loo, et al.. (2024). Source/Drain Epitaxy for Nanosheet-Based CFET Devices. ECS Meeting Abstracts. MA2024-02(32). 2298–2298.
4.
Demuynck, S., Dmitry Batuk, Maryam Hosseini, et al.. (2024). 3D stacked devices and MOL innovations for post-Nanosheet CMOS scaling.
5.
Rio, David del, Joern-Holger Franke, Mircea Dusa, et al.. (2018). EUV pupil optimization for 32nm pitch logic structures. 10143. 66–66. 2 indexed citations
6.
Bardon, M. Garcia, Stefan Cosemans, Philippe Roussel, et al.. (2011). Variability and technology aware SRAM Product yield maximization. Symposium on VLSI Technology. 222–223. 8 indexed citations
7.
Lansbergen, G. P., Rajib Rahman, J. Verduijn, et al.. (2011). Lifetime-Enhanced Transport in Silicon due to Spin and Valley Blockade. Physical Review Letters. 107(13). 136602–136602. 23 indexed citations
8.
Chiarella, T., Liesbeth Witters, A. Mercha, et al.. (2010). Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession. Solid-State Electronics. 54(9). 855–860. 99 indexed citations
9.
Ortolland, C., Wilfried Vandervorst, C. Vrancken, et al.. (2010). Laser annealed junctions: Pocket profile analysis using an atomistic kinetic Monte Carlo approach. 73–74. 6 indexed citations
10.
Parvais, Bertrand, A. Mercha, Nadine Collaert, et al.. (2009). The device architecture dilemma for CMOS technologies: Opportunities & challenges of finFET over planar MOSFET. VUBIR (Vrije Universiteit Brussel). 80–81. 29 indexed citations
11.
Kittl, J. A., Małgorzata Pawlak, C. Torregiani, et al.. (2007). Kinetics of Ni3Si2 formation in the Ni2Si–NiSi thin film reaction from in situ measurements. Applied Physics Letters. 91(23). 12 indexed citations
12.
Ortolland, C., L.-Å. Ragnarsson, Paola Favia, et al.. (2006). Optimized ultra-low thermal budget process flow for advanced High-K / Metal gate first CMOS using laser-annealing technology. Symposium on VLSI Technology. 38–39. 1 indexed citations
13.
Sellier, H., G. P. Lansbergen, J. Caro, et al.. (2006). Transport Spectroscopy of a Single Dopant in a Gated Silicon Nanowire. Physical Review Letters. 97(20). 206805–206805. 191 indexed citations
14.
Kittl, J. A., A. Lauwers, A. Veloso, et al.. (2006). CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS:NiSi, PMOS:$\hbox{Ni}_{2}\hbox{Si}$, and $\hbox{Ni}_{31}\hbox{Si}_{12}$) on HfSiON. IEEE Electron Device Letters. 27(12). 966–968. 14 indexed citations
15.
Dixit, Abhisek, K.G. Anil, R. Rooyackers, et al.. (2006). Minimization of specific contact resistance in multiple gate NFETs by selective epitaxial growth of Si in the HDD regions. Solid-State Electronics. 50(4). 587–593. 13 indexed citations
16.
Kittl, J. A., A. Lauwers, A. Veloso, et al.. (2006). Linewidth effect and phase control in Ni fully silicided gates. IEEE Electron Device Letters. 27(8). 647–649. 11 indexed citations
17.
Collaert, Nadine, M. Demand, Isabelle Ferain, et al.. (2005). Tall triple-gate devices with TiN/HfO/sub 2/ gate stack. 108–109. 38 indexed citations
18.
Wolf, Peter, R. J. Stephenson, S. Biesemans, et al.. (2002). Direct measurement of l/sub eff/ and channel profile in MOSFETs using 2-D carrier profiling techniques. 559–562. 8 indexed citations
19.
Simoen, Eddy, et al.. (1998). Comparison of the freeze-out effect in In and B doped n-MOSFETs in the range 4.2-300 K. 8(3). 1 indexed citations
20.
Kubicek, Stefan, S. Biesemans, & K. De Meyer. (1996). One junction approach to make deep submicron PMOSFETs for low power applications. European Solid-State Device Research Conference. 523–526. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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