T. Chiarella

2.4k total citations
109 papers, 1.3k citations indexed

About

T. Chiarella is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Biomedical Engineering. According to data from OpenAlex, T. Chiarella has authored 109 papers receiving a total of 1.3k indexed citations (citations by other indexed papers that have themselves been cited), including 107 papers in Electrical and Electronic Engineering, 10 papers in Atomic and Molecular Physics, and Optics and 5 papers in Biomedical Engineering. Recurrent topics in T. Chiarella's work include Semiconductor materials and devices (96 papers), Advancements in Semiconductor Devices and Circuit Design (94 papers) and Integrated Circuits and Semiconductor Failure Analysis (48 papers). T. Chiarella is often cited by papers focused on Semiconductor materials and devices (96 papers), Advancements in Semiconductor Devices and Circuit Design (94 papers) and Integrated Circuits and Semiconductor Failure Analysis (48 papers). T. Chiarella collaborates with scholars based in Belgium, United States and India. T. Chiarella's co-authors include Naoto Horiguchi, G. Groeseneken, Thomas Hoffmann, B. Kaczer, M. Togo, J. Franco, A. Mercha, Stefan Kubicek, P. Absil and Jérôme Mitard and has published in prestigious journals such as Applied Physics Letters, ACS Applied Materials & Interfaces and IEEE Access.

In The Last Decade

T. Chiarella

100 papers receiving 1.3k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
T. Chiarella Belgium 19 1.3k 174 147 137 26 109 1.3k
P. Zeitzoff United States 19 1.4k 1.1× 159 0.9× 223 1.5× 132 1.0× 24 0.9× 80 1.5k
Katsuyoshi Washio Japan 20 1.2k 0.9× 215 1.2× 216 1.5× 169 1.2× 19 0.7× 157 1.3k
A. De Keersgieter Belgium 23 1.7k 1.3× 124 0.7× 97 0.7× 240 1.8× 52 2.0× 117 1.7k
Lars‐Åke Ragnarsson Belgium 20 1.3k 1.1× 134 0.8× 217 1.5× 71 0.5× 22 0.8× 97 1.4k
S. Chakravarthi United States 12 939 0.7× 135 0.8× 108 0.7× 66 0.5× 39 1.5× 23 996
Mehdi Saremi United States 17 750 0.6× 124 0.7× 297 2.0× 144 1.1× 13 0.5× 27 866
Philippe Matagne Belgium 18 937 0.7× 350 2.0× 417 2.8× 334 2.4× 19 0.7× 73 1.3k
Masiar Sistani Austria 16 496 0.4× 242 1.4× 157 1.1× 297 2.2× 21 0.8× 60 614
S. Tyagi United States 11 773 0.6× 157 0.9× 122 0.8× 193 1.4× 12 0.5× 18 835
M. Aoulaiche Belgium 19 1.3k 1.1× 89 0.5× 135 0.9× 52 0.4× 20 0.8× 145 1.4k

Countries citing papers authored by T. Chiarella

Since Specialization
Citations

This map shows the geographic impact of T. Chiarella's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Chiarella with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Chiarella more than expected).

Fields of papers citing papers by T. Chiarella

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Chiarella. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Chiarella. The network helps show where T. Chiarella may publish in the future.

Co-authorship network of co-authors of T. Chiarella

This figure shows the co-authorship network connecting the top 25 collaborators of T. Chiarella. A scholar is included among the top collaborators of T. Chiarella based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Chiarella. T. Chiarella is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Eyben, Pierre, A. De Keersgieter, Philippe Matagne, et al.. (2024). Predictive and prospective calibrated TCAD to improve device performances in sub-20 nm gate length p-FinFETs. Japanese Journal of Applied Physics. 63(4). 04SP03–04SP03. 1 indexed citations
2.
Brown, James, Rui Gao, Zhigang Ji, et al.. (2023). A Pragmatic Model to Predict Future Device Aging. IEEE Access. 11. 127725–127736. 1 indexed citations
3.
Chiarella, T., et al.. (2022). Investigation of Dielectric and Quantum Confinement Based Dopant Deactivation in the Extension Region of FinFET. IEEE Electron Device Letters. 43(8). 1171–1174. 1 indexed citations
4.
Eyben, Pierre, Goutham Arutchelvan, T. Chiarella, et al.. (2022). Investigation of access resistance components in Si-channel p-FinFET using cascaded devices.. 1 indexed citations
5.
Jang, Doyoung, T. Chiarella, F. M. Bufler, et al.. (2021). Experimental Validation of Process-Induced Variability Aware SPICE Simulation Platform for Sub-20 nm FinFET Technologies. IEEE Transactions on Electron Devices. 68(3). 976–980. 6 indexed citations
6.
Vincent, Benjamin, M. Kamon, T. Schram, et al.. (2020). Process Variation Analysis of Device Performance Using Virtual Fabrication: Methodology Demonstrated on a CMOS 14-nm FinFET Vehicle. IEEE Transactions on Electron Devices. 67(12). 5374–5380. 11 indexed citations
7.
Mohapatra, Nihar R., et al.. (2019). Effect of Sub-10nm Fin-widths on the Analog Performance of FinFETs. 7–9. 1 indexed citations
8.
Kikuchi, Yoshiaki, T. Chiarella, David De Roest, et al.. (2017). The Improvement of Subthreshold Slope and Transconductance of p-Type Bulk Si Field-Effect Transistors by Solid-Source Doping. IEEE Transactions on Electron Devices. 64(6). 2492–2497. 2 indexed citations
9.
Franco, J., Subhadeep Mukhopadhyay, Pieter Weckx, et al.. (2016). Statistical model of the NBTI-induced threshold voltage, subthreshold swing, and transconductance degradations in advanced p-FinFETs. HAL (Le Centre pour la Communication Scientifique Directe). 15.3.1–15.3.4. 12 indexed citations
10.
Lee, Jae Wook, Eddy Simoen, A. Veloso, et al.. (2013). Sidewall Crystalline Orientation Effect of Post-treatments for a Replacement Metal Gate Bulk Fin Field Effect Transistor. ACS Applied Materials & Interfaces. 5(18). 8865–8868. 15 indexed citations
11.
Lee, Jae Wook, Eddy Simoen, R. Ritzenthaler, et al.. (2013). 1/f noise analysis of replacement metal gate bulk p-type fin field effect transistor. Applied Physics Letters. 102(7). 10 indexed citations
12.
Theodorou, Christoforos, et al.. (2012). Flicker noise in n-channel nanoscale tri-gate fin-shaped field-effect transistors. Applied Physics Letters. 101(24). 4 indexed citations
13.
Franco, J., B. Kaczer, M. Toledano-Luque, et al.. (2012). Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs. 5A.4.1–5A.4.6. 75 indexed citations
14.
Bardon, M. Garcia, Stefan Cosemans, Philippe Roussel, et al.. (2011). Variability and technology aware SRAM Product yield maximization. Symposium on VLSI Technology. 222–223. 8 indexed citations
15.
Chiarella, T., Liesbeth Witters, A. Mercha, et al.. (2010). Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession. Solid-State Electronics. 54(9). 855–860. 99 indexed citations
16.
Lee, Jae Wook, Doyoung Jang, Mireille Mouis, et al.. (2010). Experimental analysis of surface roughness scattering in FinFET devices. 34. 305–308. 1 indexed citations
17.
Parvais, Bertrand, A. Mercha, Nadine Collaert, et al.. (2009). The device architecture dilemma for CMOS technologies: Opportunities & challenges of finFET over planar MOSFET. VUBIR (Vrije Universiteit Brussel). 80–81. 29 indexed citations
18.
Chiarella, T., Liesbeth Witters, A. Mercha, et al.. (2009). Migrating from planar to FinFET for further CMOS scaling: SOI or Bulk?. VUBIR (Vrije Universiteit Brussel). 85–88. 11 indexed citations
19.
Ortolland, C., T. Chiarella, Stefan Kubicek, et al.. (2008). Laser-annealed junctions with advanced CMOS gate stacks for 32nm node: perspectives on device performance and manufacturability. 186–187. 4 indexed citations
20.
Ortolland, C., L.-Å. Ragnarsson, Paola Favia, et al.. (2006). Optimized ultra-low thermal budget process flow for advanced High-K / Metal gate first CMOS using laser-annealing technology. Symposium on VLSI Technology. 38–39. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by P. Zeitzoff Breakdown of academic impact, for papers by Katsuyoshi Washio Breakdown of academic impact, for papers by A. De Keersgieter Breakdown of academic impact, for papers by Lars‐Åke Ragnarsson Breakdown of academic impact, for papers by S. Chakravarthi Breakdown of academic impact, for papers by Mehdi Saremi Breakdown of academic impact, for papers by Philippe Matagne Breakdown of academic impact, for papers by Masiar Sistani Breakdown of academic impact, for papers by S. Tyagi Breakdown of academic impact, for papers by M. Aoulaiche
Rankless by CCL
2026