C. Vrancken

1.7k citations

70 papers · 1.0k indexed · h-index 19

Impact in

Electrical and Electronic Engineering top 5%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Silicon and Solar Cell Technologies
- Ferroelectric and Negative Capacitance Devices
Atomic and Molecular Physics, and Optics top 5%
- Semiconductor materials and interfaces

Papers in

Electrical and Electronic Engineering 68
- Semiconductor materials and devices 51
- Silicon and Solar Cell Technologies 25
- Advancements in Semiconductor Devices and Circuit Design 24
- Integrated Circuits and Semiconductor Failure Analysis 15
- Ferroelectric and Negative Capacitance Devices 13
- Advanced Memory and Neural Computing 6
Atomic and Molecular Physics, and Optics 29
- Semiconductor materials and interfaces 29

Co-authors: A. Lauwers C. Demeurisse M.J.H. van Dal S. Biesemans P. Absil Karen Maex J. A. Kittl Małgorzata Pawlak
Journals: Microelectronic Engineering (10 papers)IEEE Electron Device Letters (8 papers)Applied Physics Letters (6 papers)Journal of Applied Physics (2 papers)IEEE Transactions on Electron Devices (2 papers)
Partner nations: Belgium United States Japan

In The Last Decade

C. Vrancken

69 papers receiving 969 citations

Peers

Countries citing papers authored by C. Vrancken

Since Specialization

Citations

This map shows the geographic impact of C. Vrancken's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by C. Vrancken with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites C. Vrancken more than expected).

Fields of papers citing papers by C. Vrancken

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by C. Vrancken. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by C. Vrancken. The network helps show where C. Vrancken may publish in the future.

Co-authorship network

The 25 scholars most cited alongside C. Vrancken, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with C. Vrancken Line = papers co-authored together C. Vrancken links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Towards 1X DRAM: Improved leakage 0.4 nm EOT STO-based MIMcap and explanation of leakage reduction mechanism showing further potential Symposium on VLSI Technology ·Małgorzata Pawlak, B. Kaczer, D Dobrott, Minsoo Kim, M. Popovici, Johan Swerts, Kazuyuki Tomida, Karl Opsomer, Marc Schaekers, C. Vrancken, B. Govoreanu, Attilio Belmonte, C. Demeurisse, I. Debusschere, L. Altimime, V. V. Afanas’ev, J. A. Kittl	2011	4
2	Impact of bottom electrode and SrxTiyOz film formation on physical and electrical properties of metal-insulator-metal capacitors Applied Physics Letters ·Małgorzata Pawlak, B. Kaczer, Amy Galloway, M. Popovici, Johan Swerts, Emanuel Marcel Braga Costa, Karl Opsomer, Paola Favia, Kazuyuki Tomida, Attilio Belmonte, B. Govoreanu, C. Vrancken, C. Demeurisse, H. Bender, V. V. Afanas’ev, I. Debusschere, L. Altimime, J. A. Kittl	2011	24
3	Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession Solid-State Electronics ·T. Chiarella, Liesbeth Witters, A. Mercha, C. Kerner, Michał Rakowski, C. Ortolland, (unknown), Bertrand Parvais, A. De Keersgieter, Stefan Kubicek, A. Redolfi, C. Vrancken, S. Brus, A. Lauwers, P. Absil, S. Biesemans, Thomas Hoffmann	2010	99
4	Laser annealed junctions: Pocket profile analysis using an atomistic kinetic Monte Carlo approach Ivy Jaguzny, C. Ortolland, Wilfried Vandervorst, C. Vrancken, Erik Rosseel, Trudo Clarysse, Vahid Sharifi, S. Biesemans, Jailson Almeida Conceição	2010	6
5	Migrating from planar to FinFET for further CMOS scaling: SOI or Bulk? VUBIR (Vrije Universiteit Brussel) ·T. Chiarella, Liesbeth Witters, A. Mercha, C. Kerner, R. Dittrich, Michał Rakowski, C. Ortolland, Lars‐Åke Ragnarsson, Bertrand Parvais, A. De Keersgieter, S. Kubicek, A. Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, P. Absil, S. Biesemans, Thomas Hoffmann	2009	11
6	Migrating from planar to FinFET for further CMOS scaling: SOI or bulk? VUBIR (Vrije Universiteit Brussel) ·T. Chiarella, Liesbeth Witters, A. Mercha, C. Kerner, R. Dittrich, Michał Rakowski, C. Ortolland, Lars‐Åke Ragnarsson, Bertrand Parvais, A. De Keersgieter, S. Kubicek, A. Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, P. Absil, S. Biesemans, Thomas Hoffmann	2009	20
7	Laser-annealed junctions with advanced CMOS gate stacks for 32nm node: perspectives on device performance and manufacturability C. Ortolland, Ivy Jaguzny, T. Chiarella, Stefan Kubicek, C. Kerner, Wilfried Vandervorst, A. Opdebeeck, C. Vrancken, Naoto Horiguchi, Muriel de Potter de ten Broeck, M. Aoulaiche, Erik Rosseel, Susan B. Felch, Vahid Sharifi, R.J. Schreutelkamp, Gopala Radhakrishna Pillai, Jailson Almeida Conceição	2008	4
8	NI (PT) SI Thermal Stability Improvement by Carbon Implantation ECS Transactions ·S. Mertens, T. Y. Hoffmann, C. Vrancken, S. Jakschik, Olivier Richard, Eveline Verleysen, H. Bender, Chao Zhao, Wilfried Vandervorst, P. Absil, A. Lauwers	2008	8
9	Systematic TLM Measurements of NiSi and PtSi Specific Contact Resistance to n- and p-Type Si in a Broad Doping Range IEEE Electron Device Letters ·Lipei Yang, M.J.H. van Dal, A. Lauwers, C. Vrancken, Alexey Y. Kovalgin, R.A.M. Wolters	2008	77
10	Work function of Ni3Si2 on HfSixOy and SiO2 and its implication for Ni fully silicided gate applications Applied Physics Letters ·J. A. Kittl, B. J. O’Sullivan, V. Kaushik, A. Lauwers, Małgorzata Pawlak, Thomas Hoffmann, C. Demeurisse, C. Vrancken, A. Veloso, P. Absil, S. Biesemans	2007	8
11	Direct evidence of linewidth effect: Ni31Si12 and Ni3Si formation on 25nm Ni fully silicided gates Applied Physics Letters ·J. A. Kittl, A. Lauwers, C. Demeurisse, C. Vrancken, Stefan Kubicek, P. Absil, S. Biesemans	2007	6
12	Laser Annealed Junctions: Process Integration Sequence Optimization for Advanced CMOS Technologies Jailson Almeida Conceição, Ivy Jaguzny, Susan B. Felch, S. Severi, Miyo Snyder Niijima, Hans Peter Forstner, C. Vrancken, M. de Potter, Benny Van Daele, H. Bender, M. Niwa, R. Schreutelkamp, Wilfried Vandervorst, S. Biesemans, P. Absil	2007	7
13	CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS:NiSi, PMOS:$\hbox{Ni}_{2}\hbox{Si}$, and $\hbox{Ni}_{31}\hbox{Si}_{12}$) on HfSiON IEEE Electron Device Letters ·J. A. Kittl, A. Lauwers, A. Veloso, Thomas Hoffmann, Stefan Kubicek, M. Niwa, M.J.H. van Dal, Małgorzata Pawlak, S. Brus, C. Demeurisse, C. Vrancken, P. Absil, S. Biesemans	2006	14
14	Ni, Pt and Yb Based Fully Silicided (FUSI) Gates for Scaled CMOS Technologies ECS Transactions ·J. A. Kittl, A. Lauwers, Mark van Dal, Hongyu Yu, A. Veloso, Aurea Tamami Minagawa Toriyama, Małgorzata Pawlak, C. Demeurisse, Stefan Kubicek, M. Niwa, C. Vrancken, Рощин Виталий Юрьевич, S. Biesemans	2006	1
15	Study of silicide contacts to SiGe source/drain Microelectronic Engineering ·A. Lauwers, M.J.H. van Dal, Peter Verheyen, O. Chamirian, C. Demeurisse, S. Mertens, C. Vrancken, Barry Leinert, Neville Baia, J. A. Kittl	2006	7
16	Phase effects and short gate length device implementation of Ni fully silicided (FUSI) gates Microelectronic Engineering ·J. A. Kittl, Małgorzata Pawlak, A. Lauwers, C. Demeurisse, Thomas Hoffmann, A. Veloso, K.G. Anil, Stefan Kubicek, M. Niwa, M.J.H. van Dal, Olivier Richard, M. Jurczak, C. Vrancken, T. Chiarella, S. Brus, Karen Maex, S. Biesemans	2006	4
17	The relation between phase transformation and onset of thermal degradation in nanoscale CoSi2-polycrystalline silicon structures Journal of Applied Physics ·M.J.H. van Dal, D. Jawarani, J. G. M. van Berkum, M. Kaiser, J. A. Kittl, C. Vrancken, M. de Potter, Yoshihide Miyawaki, Karen Maex	2004	8
18	Low temperature spike anneal for Ni-silicide formation Microelectronic Engineering ·A. Lauwers, J. A. Kittl, Mark van Dal, O. Chamirian, Richard Lindsay, M. de Potter, C. Demeurisse, C. Vrancken, Karen Maex, Xavier Llimona i Pagès, Yu-Xia, Victor P. Kuznetsov, E.H.A. Granneman	2004	16
19	Silicides for the 100-nm node and beyond: Co-silicide, Co(Ni)-silicide and Ni-silicide Microelectronic Engineering ·A. Lauwers, M. de Potter, O. Chamirian, Richard Lindsay, C. Demeurisse, C. Vrancken, Karen Maex	2002	47
20	Electrical Performance and Scalability of Ni-monosilicide towards sub 0.13 μm Technologies MRS Proceedings ·A. Lauwers, N.S. Desyatov, Richard Lindsay, An Steegen, Mochamad Gustaf Maulana, eka Dragicevic, C. Vrancken, Karen Maex	2001	1

About C. Vrancken

C. Vrancken is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics, Materials Chemistry, Surfaces, Coatings and Films and Biomedical Engineering, having authored 70 papers that have together received 1.0k indexed citations. Recurring topics across this work include Semiconductor materials and devices (51 papers), Semiconductor materials and interfaces (29 papers), Silicon and Solar Cell Technologies (25 papers), Advancements in Semiconductor Devices and Circuit Design (24 papers), Integrated Circuits and Semiconductor Failure Analysis (15 papers), Ferroelectric and Negative Capacitance Devices (13 papers), Silicon Nanostructures and Photoluminescence (8 papers) and Advanced Memory and Neural Computing (6 papers). The work is most often cited by research in Electrical and Electronic Engineering (939 citations), Atomic and Molecular Physics, and Optics (411 citations), Materials Chemistry (195 citations), Hardware and Architecture (18 citations) and Biomedical Engineering (118 citations). C. Vrancken has collaborated with scholars based in Belgium, United States and Japan. Frequent co-authors include A. Lauwers, C. Demeurisse, M.J.H. van Dal, S. Biesemans, P. Absil, Karen Maex, J. A. Kittl, Małgorzata Pawlak, R.A.M. Wolters and Alexey Y. Kovalgin. Their work appears in journals such as Microelectronic Engineering, IEEE Electron Device Letters, Applied Physics Letters, Journal of Applied Physics and IEEE Transactions on Electron Devices.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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