P. Ranade

2.8k total citations
36 papers, 1.3k citations indexed

About

P. Ranade is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Biomedical Engineering. According to data from OpenAlex, P. Ranade has authored 36 papers receiving a total of 1.3k indexed citations (citations by other indexed papers that have themselves been cited), including 34 papers in Electrical and Electronic Engineering, 14 papers in Atomic and Molecular Physics, and Optics and 7 papers in Biomedical Engineering. Recurrent topics in P. Ranade's work include Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (24 papers) and Semiconductor materials and interfaces (14 papers). P. Ranade is often cited by papers focused on Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (24 papers) and Semiconductor materials and interfaces (14 papers). P. Ranade collaborates with scholars based in United States, Italy and Taiwan. P. Ranade's co-authors include Chenming Hu, Tsu-Jae King, Tsu-Jae King, I. Polishchuk, Hideki Takeuchi, Tsu‐Jae King, Chenming Hu, Qiang Lu, R. Lin and Daewon Ha and has published in prestigious journals such as Applied Physics Letters, Proceedings of the IEEE and Applied Surface Science.

In The Last Decade

P. Ranade

33 papers receiving 1.2k citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
P. Ranade 1.3k 220 148 147 66 36 1.3k
Wataru Mizubayashi 1.4k 1.1× 235 1.1× 287 1.9× 165 1.1× 29 0.4× 140 1.4k
C. Auth 1.7k 1.3× 186 0.8× 186 1.3× 464 3.2× 28 0.4× 17 1.8k
Lars‐Åke Ragnarsson 1.3k 1.0× 134 0.6× 217 1.5× 71 0.5× 22 0.3× 97 1.4k
P. Fazan 1.2k 1.0× 188 0.9× 282 1.9× 186 1.3× 25 0.4× 115 1.3k
Barry O’Sullivan 970 0.8× 188 0.9× 333 2.3× 99 0.7× 40 0.6× 109 1.1k
Bich-Yen Nguyen 1.3k 1.0× 96 0.4× 355 2.4× 123 0.8× 41 0.6× 119 1.4k
B. Guillaumot 1.1k 0.9× 114 0.5× 220 1.5× 131 0.9× 48 0.7× 65 1.1k
T. Tatsumi 545 0.4× 247 1.1× 173 1.2× 77 0.5× 23 0.3× 78 695
J.C. Lee 1.5k 1.1× 150 0.7× 294 2.0× 45 0.3× 35 0.5× 61 1.5k
A. Kalnitsky 529 0.4× 112 0.5× 186 1.3× 92 0.6× 29 0.4× 47 602

Countries citing papers authored by P. Ranade

Since Specialization
Citations

This map shows the geographic impact of P. Ranade's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Ranade with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Ranade more than expected).

Fields of papers citing papers by P. Ranade

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Ranade. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Ranade. The network helps show where P. Ranade may publish in the future.

Co-authorship network of co-authors of P. Ranade

This figure shows the co-authorship network connecting the top 25 collaborators of P. Ranade. A scholar is included among the top collaborators of P. Ranade based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with P. Ranade. P. Ranade is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Ghani, T. & P. Ranade. (2024). The Incredible Shrinking Transistor - Shattering Perceived Barriers and Forging Ahead. 1–4. 1 indexed citations
2.
Ranade, P., et al.. (2024). Backside Interconnects for Power Delivery – Design, Manufacturability & Yield. 1–3. 1 indexed citations
3.
Packan, P., S. Cea, H. Deshpande, et al.. (2008). High performance Hi-K + metal gate strain enhanced transistors on (110) silicon. 1–4. 44 indexed citations
5.
Chang, Leland, Yang‐Kyu Choi, Daewon Ha, et al.. (2003). Extremely scaled silicon nano-CMOS devices. Proceedings of the IEEE. 9(11). 1860–1873. 202 indexed citations
6.
Ha, Daewon, P. Ranade, Yang‐Kyu Choi, et al.. (2003). Molybdenum Gate Work Function Engineering for Ultra-Thin-Body Silicon-on-Insulator (UTB SOI) MOSFETs. Japanese Journal of Applied Physics. 42(Part 1, No. 4B). 1979–1982. 5 indexed citations
7.
Takeuchi, Hideki, Wen‐Chin Lee, P. Ranade, & Tsu-Jae King. (2003). Improved PMOSFET short-channel performance using ultra-shallow Si/sub 0.8/Ge/sub 0.2/ source/drain extensions. 501–504. 2 indexed citations
8.
Ranade, P.. (2002). Advanced gate materials and processes for sub-70 nm CMOS technology. PhDT. 2 indexed citations
9.
Ranade, P., Hideki Takeuchi, Vivek Subramanian, & Tsu‐Jae King. (2002). Observation of Boron and Arsenic Mediated Interdiffusion across Germanium/Silicon Interfaces. Electrochemical and Solid-State Letters. 5(2). G5–G5. 12 indexed citations
10.
Polishchuk, I., P. Ranade, Tsu-Jae King, & Chenming Hu. (2002). Dual work function metal gate CMOS transistors fabricated by Ni-Ti interdiffusion. 411–414. 1 indexed citations
11.
Polishchuk, I., P. Ranade, Tsu‐Jae King, & Chenming Hu. (2002). Dual work function metal gate CMOS transistors by Ni-Ti interdiffusion. IEEE Electron Device Letters. 23(4). 200–202. 64 indexed citations
12.
Ranade, P., Hideki Takeuchi, Vivek Subramanian, & Tsu‐Jae King. (2002). A novel elevated source/drain PMOSFET formed by Ge-B/Si intermixing. IEEE Electron Device Letters. 23(4). 218–220. 14 indexed citations
13.
Choi, Yang‐Kyu, et al.. (2002). 30 nm ultra-thin-body SOI MOSFET with selectively deposited Ge raised S/D. 23–24. 16 indexed citations
15.
Ranade, P., Hideki Takeuchi, Wen‐Chin Lee, Vivek Subramanian, & Tsu-Jae King. (2002). Application of silicon-germanium in the fabrication of ultra-shallow extension junctions for sub-100 nm PMOSFETs. IEEE Transactions on Electron Devices. 49(8). 1436–1443. 17 indexed citations
16.
Lu, Qiang, Yee‐Chia Yeo, P. Ranade, et al.. (2002). Dual-metal gate technology for deep-submicron CMOS transistors. 72–73. 31 indexed citations
17.
Yeo, Yee-Chia, P. Ranade, Qiang Lü, et al.. (2002). Effects of high-κ dielectrics on the workfunctions of metal and silicon gates. 49–50. 16 indexed citations
18.
Lu, Qiang, P. Ranade, Hideki Takeuchi, et al.. (2001). Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectric. IEEE Electron Device Letters. 22(5). 227–229. 77 indexed citations
19.
Polishchuk, I., P. Ranade, Tsu‐Jae King, & Chenming Hu. (2001). Dual Work Function CMOS Gate Technology Based on Metal Interdiffusion. MRS Proceedings. 670. 4 indexed citations
20.
Ranade, P. & D. C. Chrzan. (1998). Nucleation of Islands During Epitaxial Growth: Influence of a Second Species. MRS Proceedings. 528. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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