K. von Arnim

600 citations

26 papers · 466 indexed · h-index 12

Co-authors: C. Pacha T. Schulz J. Berthold R. Thewes M. Jurczak Ralf Brederlow D. Schmitt‐Landsiedel A. Nackaerts
Topics: Advancements in Semiconductor Devices and Circuit Design (26 papers)Semiconductor materials and devices (22 papers)Low-power high-performance VLSI design (8 papers)
Cited by: Electrical and Electronic Engineering Hardware and Architecture Biomedical Engineering
Journals: IEEE Journal of Solid-State Circuits IEEE Transactions on Electron Devices Solid-State Electronics
Partner nations: Germany United States Belgium

In The Last Decade

K. von Arnim

25 papers receiving 444 citations

Peers

Countries citing papers authored by K. von Arnim

Since Specialization

Citations

This map shows the geographic impact of K. von Arnim's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. von Arnim with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. von Arnim more than expected).

Fields of papers citing papers by K. von Arnim

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. von Arnim. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. von Arnim. The network helps show where K. von Arnim may publish in the future.

Co-authorship network of co-authors of K. von Arnim

This figure shows the co-authorship network connecting the top 25 collaborators of K. von Arnim. A scholar is included among the top collaborators of K. von Arnim based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. von Arnim. K. von Arnim is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Highly accurate product-level aging monitoring in 40nm CMOS 2010 ·K.R. Hofmann,(unknown),K. Ermisch,Christian Schlünder,Wolfgang Gustin,T. Pompl,Georg Georgakos,K. von Arnim,(unknown),(unknown),Thomas Baumann,C. Pacha	20
2	A voltage scaling model for performance evaluation in digital CMOS circuits 2009 ·K. von Arnim,K. Schruefer,Thomas Baumann,Karl Hofmann,T. Schulz,C. Pacha,(unknown)	0
3	Multi-gate devices for the 32nm technology node and beyond 2008 ·Solid-State Electronics ·Nadine Collaert,A. De Keersgieter,Abhisek Dixit,Isabelle Ferain,Liangzhen Lai,D. Lenoble,A. Mercha,A. Nackaerts,Bartek Pawlak,R. Rooyackers,T. Schulz,(unknown),(unknown),M.J.H. van Dal,Peter Verheyen,K. von Arnim,Liesbeth Witters,K. De Meyer,S. Biesemans,M. Jurczak	44
4	Low-voltage 6T FinFET SRAM cell with high SNM using HfSiON/TiN gate stack, fin widths down to 10nm and 30nm gate length 2008 ·VUBIR (Vrije Universiteit Brussel) ·Nadine Collaert,K. von Arnim,R. Rooyackers,T. Vandeweyer,A. Mercha,Bertrand Parvais,Liesbeth Witters,A. Nackaerts,Efrain Altamirano Sánchez,M. Demand,Andriy Hikavyy,S. Demuynck,K. Devriendt,Florian Bauer,Isabelle Ferain,A. Veloso,K. De Meyer,S. Biesemans,M. Jurczak	13
5	Fabrication, optimization and application of complementary Multiple-Gate Tunneling FETs 2008 ·M. Fulde,(unknown),Mirjam Weis,(unknown),K. von Arnim,T. Nirschl,(unknown),G. Knoblinger,W. Hänsch,G. Wachutka,D. Schmitt‐Landsiedel	20
6	Advances in Multi-Gate MOSFET Circuit Design 2007 ·M. Fulde,K. von Arnim,C. Pacha,Florian Bauer,C. Russ,(unknown),Wenjing Xiong,Andrew Marshall,C. Rinn Cleavelin,K. Schruefer,D. Schmitt‐Landsiedel,G. Knoblinger	5
7	Efficiency of low-power design techniques in multi-gate FET CMOS circuits 2007 ·C. Pacha,K. von Arnim,Florian Bauer,T. Schulz,Wei Xiong,(unknown),Andrew Marshall,Thomas Baumann,C. Rinn Cleavelin,K. Schruefer,J. Berthold	7
8	Intrinsic Advantages of SOI Multiple-Gate MOSFET (MuGFET) for Low Power Applications 2007 ·ECS Transactions ·Weize Xiong,C. Rinn Cleavelin,(unknown),(unknown),K. Schruefer,K. von Arnim,T. Schulz,Ian Cayrefourcq,C. Mazuré,P. Patruno,(unknown),(unknown),Xin Sun,Tsu‐Jae King Liu,K. Cherkaoui,J.P. Colinge	11
9	A Low-Power Multi-Gate FET CMOS Technology with 13.9ps Inverter Delay, Large-Scale Integrated High Performance Digital Circuits and SRAM 2007 ·K. von Arnim,E. Augendre,(unknown),T. Schulz,(unknown),Florian Bauer,A. Nackaerts,R. Rooyackers,T. Vandeweyer,B. Degroote,Nadine Collaert,Abhisek Dixit,(unknown),Wenjing Xiong,Andrew Marshall,C. Rinn Cleavelin,(unknown),M. Jurczak	61
10	Layout options for stability tuning of SRAM cells in multi-gate-FET technologies 2007 ·Florian Bauer,K. von Arnim,C. Pacha,T. Schulz,M. Fulde,A. Nackaerts,M. Jurczak,Wenjing Xiong,(unknown),C. Rinn Cleavelin,(unknown),Georg Georgakos,D. Schmitt‐Landsiedel	13
11	Analog design challenges and trade-offs using emerging materials and devices 2007 ·M. Fulde,A. Mercha,C. Gustin,Bertrand Parvais,V. Subramanian,K. von Arnim,Florian Bauer,K. Schruefer,D. Schmitt‐Landsiedel,G. Knoblinger	5
12	Analog design challenges and trade-offs using emerging materials and devices 2007 ·VUBIR (Vrije Universiteit Brussel) ·M. Fulde,A. Mercha,C. Gustin,Bertrand Parvais,V. Subramanian,K. von Arnim,Florian Bauer,K. Schruefer,D. Schmitt‐Landsiedel,G. Knoblinger	10
13	An Effective Switching Current Methodology to Predict the Performance of Complex Digital Circuits 2007 ·K. von Arnim,C. Pacha,Karl Hofmann,T. Schulz,(unknown),J. Berthold	33
14	Exploration of the Circuit Potential of Multiple-Gate Field-Effect Transistors 2006 ·J. Ramos,(unknown),T. Chiarella,K. von Arnim,(unknown),E. Augendre,S. Severi,C. Kerner,M. Rosmeulen,Thomas Hoffmann,Nadine Collaert,M. Jurczak,S. Biesemans	1
15	Circuit design issues in multi-gate FET CMOS technologies 2006 ·C. Pacha,K. von Arnim,T. Schulz,Weize Xiong,Michael L. Gostkowski,G. Knoblinger,Andrew Marshall,T. Nirschl,J. Berthold,C. Russ,Harald Goßner,C. Duvvury,P. Patruno,(unknown),K. Schruefer	23
16	Multi-Gate MOSFET Design 2006 ·G. Knoblinger,C. Pacha,F. Kuttner,(unknown),C. Russ,(unknown),P. Patruno,T. Schulz,K. von Arnim,(unknown),(unknown),Wenjing Xiong,C. Rinn Cleavelin,K. Schruefer	6
17	MUGFET - alternative transistor architecture for 32 nm CMOS generation 2006 ·M. Jurczak,Nadine Collaert,R. Rooyackers,Anil Kottantharayil,Abhisek Dixit,Isabelle Ferain,Tamer San,(unknown),D. Lenoble,Paul Zimmerman,A. De Keersgieter,K. von Arnim,(unknown),A. Mercha,(unknown)	1
18	Efficiency of body biasing in 90-nm CMOS for low-power digital circuits 2005 ·IEEE Journal of Solid-State Circuits ·K. von Arnim,(unknown),(unknown),H.L. Fiedler,Ralf Brederlow,R. Thewes,J. Berthold,C. Pacha	35
19	A low-leakage 2.5GHz skewed CMOS 32b adder for nanometer CMOS technologies 2005 ·K. von Arnim,(unknown),R. Thewes,C. Pacha	6
20	Impact of STI-induced stress, inverse narrow width effect, and statistical V/sub TH/ variations on leakage currents in 120 nm CMOS 2004 ·C. Pacha,B. Martin,K. von Arnim,Ralf Brederlow,D. Schmitt‐Landsiedel,(unknown),J. Berthold,R. Thewes	37

About K. von Arnim

K. von Arnim is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Infectious Diseases, having authored 26 papers that have together received 466 indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (26 papers), Semiconductor materials and devices (22 papers) and Low-power high-performance VLSI design (8 papers). The work is most often cited by research in Electrical and Electronic Engineering (460 citations), Hardware and Architecture (34 citations) and Biomedical Engineering (75 citations). K. von Arnim has collaborated with scholars based in Germany, United States and Belgium. Frequent co-authors include C. Pacha, T. Schulz, J. Berthold, R. Thewes, M. Jurczak, Ralf Brederlow, D. Schmitt‐Landsiedel, A. Nackaerts, Nadine Collaert and R. Rooyackers. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Solid-State Electronics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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