K. Schruefer

708 citations

32 papers · 488 indexed · h-index 12

Electrical and Electronic Engineering top 10%
- Advancements in Semiconductor Devices and Circuit Design 30
- Semiconductor materials and devices 30
- Integrated Circuits and Semiconductor Failure Analysis 7
- Silicon Carbide Semiconductor Technologies 7
- Ferroelectric and Negative Capacitance Devices 4
- Electrostatic Discharge in Electronics 3
- Low-power high-performance VLSI design 3
Biomedical Engineering
- Analog and Mixed-Signal Circuit Design 4
Hardware and Architecture
Atomic and Molecular Physics, and Optics
Materials Chemistry

Co-authors: C. Rinn Cleavelin P. Patruno G. Knoblinger N. Rovedo Terence B. Hook T. Schulz F Guarin E.L. Adler
Cited by: Electrical and Electronic Engineering Biomedical Engineering Hardware and Architecture
Journals: IEEE Electron Device Letters (4 papers)IEEE Transactions on Device and Materials Reliability (1 paper)Japanese Journal of Applied Physics (1 paper)
Partner nations: United States Germany France

In The Last Decade

K. Schruefer

29 papers receiving 460 citations

Peers

Countries citing papers authored by K. Schruefer

Since Specialization

Citations

This map shows the geographic impact of K. Schruefer's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Schruefer with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Schruefer more than expected).

Fields of papers citing papers by K. Schruefer

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. Schruefer. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Schruefer. The network helps show where K. Schruefer may publish in the future.

Co-authorship network

The 25 scholars most cited alongside K. Schruefer, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with K. Schruefer Line = papers co-authored together K. Schruefer links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	A voltage scaling model for performance evaluation in digital CMOS circuits K. von Arnim,K. Schruefer,Thomas Baumann,Karl Hofmann,T. Schulz,C. Pacha,実樹晴竹内	2009	0
2	Advances in Multi-Gate MOSFET Circuit Design M. Fulde,K. von Arnim,C. Pacha,Florian Bauer,C. Russ,Takashi Iwama,Wenjing Xiong,Andrew Marshall,C. Rinn Cleavelin,K. Schruefer,D. Schmitt‐Landsiedel,G. Knoblinger	2007	5
3	Efficiency of low-power design techniques in multi-gate FET CMOS circuits C. Pacha,K. von Arnim,Florian Bauer,T. Schulz,Wei Xiong,Rogelio Pinto Mota,Andrew Marshall,Thomas Baumann,C. Rinn Cleavelin,K. Schruefer,J. Berthold	2007	7
4	Preparation, Characterization, and Damage-Free Processing of Advanced Multiple-Gate FETs Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena ·Jeffrey M. Lauerhaas,JARCILENE MARIA SOUSA DE ARAÚJO,Wei Xiong,Brunilda Veray,Charles Bendig,Franz Gramlinger,Brian Clappin,T. Schulz,K. Schruefer	2007	5
5	A merged MuGFET and planar SOI process Andrew Marshall,C. Rinn Cleavelin,Weize Xiong,C. Pacha,G. Knoblinger,Maurizio Davì,T. Schulz,K. Schruefer,M Panek,О. Ю. Косова,P. Patruno,Christian Russ	2007	0
6	Multi-Gate SOI MOSFET Operations in Harsh Environments Wenjing Xiong,C. Rinn Cleavelin,Chen-Hsuan Hsu,Regis Le Feuvre,T. Schulz,K. Schruefer,P. Patruno,J.-P. Colinge	2007	1
7	Intrinsic Advantages of SOI Multiple-Gate MOSFET (MuGFET) for Low Power Applications ECS Transactions ·Weize Xiong,C. Rinn Cleavelin,CHOON WONG YEN GABRIEL,池田豊秀,K. Schruefer,K. von Arnim,T. Schulz,Ian Cayrefourcq,C. Mazuré,P. Patruno,Grieve Hg,Oleksandr Heorhiiovych Vilson,Xin Sun,Tsu‐Jae King Liu,K. Cherkaoui,J.P. Colinge	2007	11
8	FinFET Performance Enhancement with Tensile Metal Gates and Strained Silicon on Insulator (sSOI) Substrate Weize Xiong,Oleksandr Heorhiiovych Vilson,C. Rinn Cleavelin,T. Schulz,K. Schruefer,Ian Cayrefourcq,Grieve Hg,C. Mazuré,P. Patruno,Tsu‐Jae King Liu	2006	9
9	Design and Evaluation of Basic Analog Circuits in an Emerging MuGFET Technology G. Knoblinger,F. Kuttner,Andrew Marshall,C. Russ,C O Brantigan,P. Patruno,T. Schulz,Patty Welychka,Michael L. Gostkowski,K. Schruefer,C. Rinn Cleavelin	2006	21
10	Temperature effects on trigate SOI MOSFETs IEEE Electron Device Letters ·J.-P. Colinge,Leo Zeller,Aidan J. Quinn,Gareth Redmond,J. Alderman,Wenjing Xiong,C. Rinn Cleavelin,T. Schulz,K. Schruefer,G. Knoblinger,P. Patruno	2006	42
11	Ring Oscillator Performance and Parasitic Extraction Simulation in Finfet Technology M. Corvino,Andrew Marshall,C. Rinn Cleavelin,Weize Xiong,C. Pacha,Maurizio Davì,T. Schulz,K. Schruefer,P. Patruno	2006	4
12	Study of bending-induced strain effects on MuGFET performance IEEE Electron Device Letters ·Kyung-Sik Shin,Hyun-Yul Moon,Adolfo Quintero,C. Rinn Cleavelin,T. Schulz,K. Schruefer,P. Patruno,Lee Smith,Tsu‐Jae King Liu	2006	14
13	Circuit design issues in multi-gate FET CMOS technologies C. Pacha,K. von Arnim,T. Schulz,Weize Xiong,Michael L. Gostkowski,G. Knoblinger,Andrew Marshall,T. Nirschl,J. Berthold,C. Russ,Harald Goßner,C. Duvvury,P. Patruno,JARCILENE MARIA SOUSA DE ARAÚJO,K. Schruefer	2006	23
14	Low-temperature electron mobility in Trigate SOI MOSFETs IEEE Electron Device Letters ·J.-P. Colinge,Aidan J. Quinn,唐小意,Gareth Redmond,J. Alderman,Weize Xiong,C. Rinn Cleavelin,T. Schulz,K. Schruefer,G. Knoblinger,P. Patruno	2006	63
15	Multi-Gate MOSFET Design G. Knoblinger,C. Pacha,F. Kuttner,Chia-Yi Chien,C. Russ,C O Brantigan,P. Patruno,T. Schulz,K. von Arnim,Gamze Öz Yalaman,GP Whyte,Wenjing Xiong,C. Rinn Cleavelin,K. Schruefer	2006	6
16	Unique ESD Failure Mechanism in a MuGFET Technology Harald Goßner,Christian Russ,弘城戸,Jens Schneider,K. Schruefer,T. Schulz,Charvaka Duvvury,C. Rinn Cleavelin,Weize Xiong	2006	18
17	Effects of Hydrogen Annealing Process Conditions on Nano Scale Silicon (011) Fins MRS Proceedings ·Mirjana Beljan,Weize Xiong,R. Kulterman,T. Schulz,C. Rinn Cleavelin,R. Wise,Vinaya Untoro,P. Patruno,K. Schruefer,S. Banerjee	2005	3
18	Hot carrier reliability for 0.13 μm CMOS technology with dual gate oxide thickness Chunxiang Lin,S. Biesemans,L.K. Han,Dengwei Xia,Rod E. Lee,K. Schruefer,C. Wann,C Cravanzola,R. Mahnkopf	2002	13
19	Mechanism and process dependence of negative bias temperature instability (NBTI) for pMOSFETs with ultrathin gate dielectrics 厉春琳,Weiqiang Xin,Chih‐Yung Lin,和政筒井,K. Schruefer,saad abd alaziz muslt,N. Rovedo,Terence B. Hook,Mukesh Khare,S. A. Orudjeva,C. Wann,Tze-Chiang Chen,T.H. Ning	2002	31
20	The effects of fluorine on parametrics and reliability in a 0.18-μm 3.5/6.8 nm dual gate oxide CMOS technology IEEE Transactions on Electron Devices ·Terence B. Hook,E.L. Adler,F Guarin,Chang Jian-ping,N. Rovedo,K. Schruefer	2001	63

About K. Schruefer

K. Schruefer is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Computational Mechanics, Atomic and Molecular Physics, and Optics and Infectious Diseases, having authored 32 papers that have together received 488 indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (30 papers), Semiconductor materials and devices (30 papers), Integrated Circuits and Semiconductor Failure Analysis (7 papers), Silicon Carbide Semiconductor Technologies (7 papers), Ferroelectric and Negative Capacitance Devices (4 papers), Analog and Mixed-Signal Circuit Design (4 papers), Electrostatic Discharge in Electronics (3 papers) and Low-power high-performance VLSI design (3 papers). The work is most often cited by research in Electrical and Electronic Engineering (484 citations), Biomedical Engineering (102 citations), Hardware and Architecture (8 citations), Atomic and Molecular Physics, and Optics (31 citations) and Materials Chemistry (24 citations). K. Schruefer has collaborated with scholars based in United States, Germany and France. Frequent co-authors include C. Rinn Cleavelin, P. Patruno, G. Knoblinger, N. Rovedo, Terence B. Hook, T. Schulz, T. Schulz, F Guarin, E.L. Adler and J. Alderman. Their work appears in journals such as IEEE Electron Device Letters, IEEE Transactions on Device and Materials Reliability, Japanese Journal of Applied Physics, IEEE Transactions on Electron Devices and ECS Transactions.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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