M. Fulde

511 total citations
33 papers, 346 citations indexed

About

M. Fulde is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computational Theory and Mathematics. According to data from OpenAlex, M. Fulde has authored 33 papers receiving a total of 346 indexed citations (citations by other indexed papers that have themselves been cited), including 33 papers in Electrical and Electronic Engineering, 6 papers in Biomedical Engineering and 1 paper in Computational Theory and Mathematics. Recurrent topics in M. Fulde's work include Semiconductor materials and devices (23 papers), Advancements in Semiconductor Devices and Circuit Design (22 papers) and Radio Frequency Integrated Circuit Design (11 papers). M. Fulde is often cited by papers focused on Semiconductor materials and devices (23 papers), Advancements in Semiconductor Devices and Circuit Design (22 papers) and Radio Frequency Integrated Circuit Design (11 papers). M. Fulde collaborates with scholars based in Germany, Austria and Belgium. M. Fulde's co-authors include D. Schmitt‐Landsiedel, G. Knoblinger, T. Nirschl, Mirjam Weis, K. von Arnim, W. Hänsch, Georg Georgakos, Uwe Feldmann, J. Fischer and Robert Heinrich and has published in prestigious journals such as SHILAP Revista de lepidopterología, IEEE Electron Device Letters and Solid-State Electronics.

In The Last Decade

M. Fulde

32 papers receiving 317 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
M. Fulde Germany 11 345 71 9 8 8 33 346
David Levacq Belgium 9 368 1.1× 87 1.2× 11 1.2× 8 1.0× 6 0.8× 25 372
Nattapol Damrongplasit United States 10 448 1.3× 82 1.2× 5 0.6× 5 0.6× 13 1.6× 23 468
H. Takato Japan 10 338 1.0× 66 0.9× 12 1.3× 9 1.1× 8 1.0× 27 350
M. W. Akram India 10 301 0.9× 74 1.0× 7 0.8× 15 1.9× 10 1.3× 42 308
G. Knoblinger Germany 15 627 1.8× 143 2.0× 8 0.9× 6 0.8× 13 1.6× 45 636
Mohan V. Dunga United States 12 362 1.0× 42 0.6× 22 2.4× 3 0.4× 7 0.9× 27 373
B. Gentinne Belgium 9 338 1.0× 124 1.7× 19 2.1× 6 0.8× 14 1.8× 24 348
Sanjeev Rai India 11 260 0.8× 49 0.7× 14 1.6× 9 1.1× 3 0.4× 41 272
J.-P. Eggermont Belgium 9 311 0.9× 138 1.9× 21 2.3× 6 0.8× 13 1.6× 21 321

Countries citing papers authored by M. Fulde

Since Specialization
Citations

This map shows the geographic impact of M. Fulde's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Fulde with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Fulde more than expected).

Fields of papers citing papers by M. Fulde

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M. Fulde. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Fulde. The network helps show where M. Fulde may publish in the future.

Co-authorship network of co-authors of M. Fulde

This figure shows the co-authorship network connecting the top 25 collaborators of M. Fulde. A scholar is included among the top collaborators of M. Fulde based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Fulde. M. Fulde is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Fulde, M., et al.. (2011). An analog perspective on device reliability in 32nm high-κ metal gate technology. 65–70. 6 indexed citations
2.
Wojnowski, Maciej, et al.. (2011). A 5.9-to-7.8 GHz VCO in 65-nm CMOS using high-Q inductors in an embedded wafer level BGA package. 2011 IEEE MTT-S International Microwave Symposium. 1–1. 6 indexed citations
3.
Kuttner, F., et al.. (2011). A digitally controlled DC-DC converter for SoC in 28nm CMOS. 384–385. 20 indexed citations
4.
Іссаков, Вадим, et al.. (2011). A 5.9-to-7.8 GHz VCO in 65 nm CMOS using high-Q inductor in an embedded Wafer Level BGA package. 2011 IEEE MTT-S International Microwave Symposium. 1–4. 18 indexed citations
5.
Fulde, M., et al.. (2011). Reliability analysis of buffer stage in mixed signal application. SHILAP Revista de lepidopterología. 9. 225–230. 2 indexed citations
6.
Schmitt‐Landsiedel, D., et al.. (2010). Sensitivity Analysis Based Analytical Evaluation of Aging Degradation in Linear Circuits. European Solid-State Circuits Conference. 3 indexed citations
8.
Werner, C., et al.. (2010). A test concept for circuit level aging demonstrated by a differential amplifier. 826–829. 13 indexed citations
9.
Knoblinger, G., et al.. (2009). Assessment of the impact of technology scaling on the performance of LC-VCOs. 11. 364–367. 9 indexed citations
10.
Wambacq, Piet, Bertrand Parvais, A. Mercha, et al.. (2009). FinFET RF receiver building blocks operating above 10 GHz. VUBIR (Vrije Universiteit Brussel). 17. 360–363.
11.
Knoblinger, G., et al.. (2009). Assessment of the impact of technology scaling on the performance of LC-VCOs. Institutional Research Information System (University of Udine). 11. 351–354. 2 indexed citations
12.
Wambacq, Piet, Bertrand Parvais, A. Mercha, et al.. (2009). FinFET RF receiver building blocks operating above 10 GHz. VUBIR (Vrije Universiteit Brussel). 347–350. 1 indexed citations
13.
Fulde, M.. (2009). Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies. Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)). 8 indexed citations
14.
Fulde, M., K. von Arnim, C. Pacha, et al.. (2007). Advances in Multi-Gate MOSFET Circuit Design. 186–189. 5 indexed citations
15.
Fulde, M., et al.. (2007). Analog circuits using FinFETs: benefits in speed-accuracy-power trade-off and simulation of parasitic effects. Advances in radio science. 5. 285–290. 11 indexed citations
16.
Fulde, M., D. Schmitt‐Landsiedel, & G. Knoblinger. (2007). Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. 1249–1252. 11 indexed citations
17.
Bauer, Florian, K. von Arnim, C. Pacha, et al.. (2007). Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. 392–395. 13 indexed citations
18.
Fulde, M., A. Mercha, C. Gustin, et al.. (2007). Analog design challenges and trade-offs using emerging materials and devices. 123–126. 5 indexed citations
19.
Nirschl, T., et al.. (2005). Impact of mask alignment on the tunneling field effect transistor (TFET). 43–46. 2 indexed citations
20.
Henzler, Stephan, T. Nirschl, C. Pacha, et al.. (2005). Dynamic state-retention flipflop for fine-grained sleep-transistor scheme. 145–148. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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