P. Oldiges

1.1k citations

35 papers · 644 indexed · h-index 16

Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices 30
- Advancements in Semiconductor Devices and Circuit Design 29
- Integrated Circuits and Semiconductor Failure Analysis 10
- Silicon Carbide Semiconductor Technologies 8
- Radiation Effects in Electronics 6
- Ferroelectric and Negative Capacitance Devices 3
Hardware and Architecture top 10%
Biomedical Engineering
- Nanowire Synthesis and Applications 3
Atomic and Molecular Physics, and Optics
Materials Chemistry
Electronic, Optical and Magnetic Materials
- Copper Interconnects and Reliability 2

Co-authors: M. Ieong K. V. R. M. Murali M. Hargrove Karen Petrillo Mohit Bajaj M. Sanchez H.‐S. Philip Wong Kaushik Nayak
Cited by: Electrical and Electronic Engineering Hardware and Architecture Biomedical Engineering
Journals: IEEE Transactions on Electron Devices (5 papers)IEEE Electron Device Letters (2 papers)Journal of Computational Electronics (1 paper)
Partner nations: United States India South Korea

In The Last Decade

P. Oldiges

35 papers receiving 609 citations

Peers

Countries citing papers authored by P. Oldiges

Since Specialization

Citations

This map shows the geographic impact of P. Oldiges's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Oldiges with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Oldiges more than expected).

Fields of papers citing papers by P. Oldiges

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Oldiges. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Oldiges. The network helps show where P. Oldiges may publish in the future.

Co-authorship network

The 25 scholars most cited alongside P. Oldiges, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with P. Oldiges Line = papers co-authored together P. Oldiges links everyone, so they are left out of the graph.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work
1	Total Ionizing Dose Radiation Effects on 14 nm FinFET and SOI UTBB Technologies Zenodo (CERN European Organization for Nuclear Research) ·H.L. Hughes,P. J. McMarr,Michael L. Alles,En Xia Zhang,М.Ю. Смирнов,B. Doris,Casper Båge Von Sivers,Richard G. Southwick,P. Oldiges	2015	39
2	Hybrid methodology to model random dopant fluctuations in low doped FinFETs Journal of Computational Electronics ·Samarth Agarwal,Jeffrey B. Johnson,Mohit Bajaj,S. Furkay,P. Oldiges,Robert R. Robison,K. V. R. M. Murali	2015	1
3	CMOS Logic Device and Circuit Performance of Si Gate All Around Nanowire MOSFET IEEE Transactions on Electron Devices ·Kaushik Nayak,Mohit Bajaj,Aniruddha Konar,P. Oldiges,Kenji Natori,Hiroshi Iwai,K. V. R. M. Murali,Valipe Ramgopal Rao	2014	58
4	TDDB at low voltages: An electrochemical perspective R. Muralidhar,T. M. Shaw,F. Chen,P. Oldiges,D. C. Edelstein,Sidney Cohen,Guillaume Exterman,Griselda Bonilla,Martin Z. Bazant	2014	3
5	Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs IEEE Transactions on Electron Devices ·Kaushik Nayak,Samarth Agarwal,Mohit Bajaj,P. Oldiges,K. V. R. M. Murali,Valipe Ramgopal Rao	2014	32
6	(Invited) Silicon Germanium FinFET Device Physics, Process Integration and Modeling Considerations ECS Transactions ·Darsen D. Lu,P. Morin,Bhagawan Sahu,Terence B. Hook,Pouya Hashemi,Małgorzata Koszarek,Jorge de la Rosa-Vélez,Gangaiahgari Mahesh,A. Khakifirooz,P. Oldiges,K. Rim,B. Doris	2014	13
7	Channel doping impact on FinFETs for 22nm and beyond Abdorreza Mohammadi Nafchi,Ferdinando Cardone,Robert J. Miller,Terence B. Hook,A. Bryant,Wilfried Haensch,P. Oldiges,Isaac Lauer,T. Yamashita,V. Basker,T. Standaert,K. Rim,E. Leobandung,H. Bu,Mukesh Khare	2012	52
8	Critical analysis of 14nm device options P. Oldiges,R. Muralidhar,P. Kulkarni,Anwar Koto,Asti Dwiyanti,Dechao Guo,Mohit Bajaj,Ninad D. Sathaye	2011	11
9	Crystallographic-Orientation-Dependent Gate-Induced Drain Leakage in Nanoscale MOSFETs IEEE Transactions on Electron Devices ·R. K. Pandey,K. V. R. M. Murali,S. Furkay,P. Oldiges,Edward J. Nowak	2010	25
10	HOT-carrier degradation in undoped-body ETSOI FETS and SOI FINFETS Miaomiao Wang,T.G. Pearce,Kangguo Cheng,A. Khakifirooz,Veeraraghavan Basker,Hemanth Jagannathan,Chun-Chen Yeh,Vamsi Paruchuri,B. Doris,Huiming Bu,Chung-Hsun Lin,J. H. Stathis,K. Maitra,P. Oldiges	2010	4
11	Optimal UTB FD/SOI device structure using thin BOX for sub-50-nm SRAM design IEEE Electron Device Letters ·Saibal Mukhopadhyay,Keunwoo Kim,Xinlin Wang,D.J. Frank,P. Oldiges,Ching-Te Chuang,Kaushik Roy	2006	8
12	Challenges and Opportunities for High Performance 32 nm CMOS Technology J.W. Sleight,Isaac Lauer,O. Dokumaci,David Fried,Dechao Guo,Bala Haran,Tosihide H. YOSIDA,C. Sheraw,Thayanne Gabrielly Ribeiro De Souza,О. Н. Горшков,X. Wang,P. Oldiges,D. K. Sadana,C.Y. Sung,Wilfried Haensch,Mukesh Khare	2006	36
13	Silicon Germanium FinFET Device Physics, Process Integration and Modeling Considerations Dialnet (Universidad de la Rioja) ·Darsen D. Lu,P. Morin,Bhagawan Sahu,Terence B. Hook,Pouya Hashemi,Małgorzata Koszarek,Sarah N. Rand,Gangaiahgari Mahesh,A. Khakifirooz,P. Oldiges,K. Rim,B. Doris	2006	4
14	Gate capacitance optimization for arrays of carbon nanotube field-effect transistors Xuelin Wang,H.‐S. Philip Wong,P. Oldiges,R.J. Miller	2004	9
15	Soft error rate scaling for emerging SOI technology options P. Oldiges,K. Bernstein,David F. Heidel,B Korajkié,Ethan H. Cannon,R.H. Dennard,Haotian Tang,M. Ieong,H.‐S. Philip Wong	2003	22
16	A simulation study on thin SOI bipolar transistors with fully or partially depleted collector Q. Ouyang,Jin Cai,T.H. Ning,P. Oldiges,J. Johnson	2003	16
17	Technology modeling for emerging SOI devices M. Ieong,P. Oldiges	2003	4
18	Modeling line edge roughness effects in sub 100 nanometer gate length devices P. Oldiges,张长宝,Karen Petrillo,M. Sanchez,M. Ieong,M. Hargrove	2002	94
19	DC and AC performance analysis of 25 nm symmetric/asymmetric double-gate, back-gate and bulk CMOS M. Ieong,H.‐S. Philip Wong,Yuan Taur,P. Oldiges,D.J. Frank	2002	15
20	Theoretical determination of the temporal and spatial structure of /spl alpha/-particle induced electron-hole pair generation in silicon IEEE Transactions on Nuclear Science ·P. Oldiges,R.H. Dennard,David F. Heidel,B Korajkié,F. Assaderaghi,M. Ieong	2000	25

About P. Oldiges

P. Oldiges is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Biomedical Engineering, Electronic, Optical and Magnetic Materials and Materials Chemistry, having authored 35 papers that have together received 644 indexed citations. Recurring topics across this work include Semiconductor materials and devices (30 papers), Advancements in Semiconductor Devices and Circuit Design (29 papers), Integrated Circuits and Semiconductor Failure Analysis (10 papers), Silicon Carbide Semiconductor Technologies (8 papers), Radiation Effects in Electronics (6 papers), Ferroelectric and Negative Capacitance Devices (3 papers), Nanowire Synthesis and Applications (3 papers) and Copper Interconnects and Reliability (2 papers). The work is most often cited by research in Electrical and Electronic Engineering (637 citations), Hardware and Architecture (50 citations), Biomedical Engineering (76 citations), Atomic and Molecular Physics, and Optics (41 citations) and Materials Chemistry (51 citations). P. Oldiges has collaborated with scholars based in United States, India and South Korea. Frequent co-authors include M. Ieong, K. V. R. M. Murali, M. Hargrove, Karen Petrillo, Mohit Bajaj, M. Sanchez, H.‐S. Philip Wong, Kaushik Nayak, Valipe Ramgopal Rao and B. Doris. Their work appears in journals such as IEEE Transactions on Electron Devices, IEEE Electron Device Letters, Journal of Computational Electronics, Applied Physics Letters and Japanese Journal of Applied Physics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact