E. Leobandung

2.3k citations

51 papers · 1.3k indexed · h-index 18

Impact in

Electrical and Electronic Engineering top 5%
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Advanced Memory and Neural Computing
Atomic and Molecular Physics, and Optics top 5%
- Quantum and electron transport phenomena
- Semiconductor Quantum Structures and Devices

Papers in

Electrical and Electronic Engineering 51
- Semiconductor materials and devices 44
- Advancements in Semiconductor Devices and Circuit Design 44
- Integrated Circuits and Semiconductor Failure Analysis 9
- Low-power high-performance VLSI design 8
- Thin-Film Transistor Technologies 7
- Ferroelectric and Negative Capacitance Devices 6
Structural Biology 1

Co-authors: Stephen Y. Chou L. Jay Guo Yun Wang J. A. Ott Pouya Hashemi Wilfried Haensch Karthik Balakrishnan D.J. Frank
Journals: IEEE Transactions on Electron Devices (4 papers)Applied Physics Letters (3 papers)IEEE Electron Device Letters (1 paper)Science (1 paper)Nature Electronics (1 paper)
Partner nations: United States Japan Switzerland

In The Last Decade

E. Leobandung

48 papers receiving 1.2k citations

Peers

Countries citing papers authored by E. Leobandung

Since Specialization

Citations

This map shows the geographic impact of E. Leobandung's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by E. Leobandung with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites E. Leobandung more than expected).

Fields of papers citing papers by E. Leobandung

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by E. Leobandung. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by E. Leobandung. The network helps show where E. Leobandung may publish in the future.

Co-authors

The 25 scholars most cited alongside E. Leobandung, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with E. Leobandung Line = papers co-authored together E. Leobandung links everyone, so they are left out of the graph.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work
1	Synchronized Analog Capacitor Arrays for Parallel Convolutional Neural Network Training E. Leobandung, Malte J. Rasch, Yanxi Li	2020	2
2	Capacitor-based Cross-point Array for Analog Neural Network with Record Symmetry and Linearity Y. Li, Seyoung Kim, Xiaoyu Sun, P. M. Solomon, Tayfun Gokmen, Hsinyu Tsai, Siyuranga O. Koswatta, Zhibin Ren, R. Mo, Chun-Chen Yeh, Wilfried Haensch, E. Leobandung	2018	33
3	Electron mobility in thin In0.53Ga0.47As channel. European Solid-State Device Research Conference ·E. Cartier, A. Majumdar, K.-T. Lee, Takashi Ando, Martin M. Frank, John Rozen, K.A. Jenkins, Chundong Liang, Chiyu Cheng, J. Bruley, Marinus Hopstaken, Pranita Kerber, Jeng-Bang Yau, Xin Sun, R. Mo, Chun-Chen Yeh, E. Leobandung, Vijay Narayanan	2017	2
4	High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications Pouya Hashemi, Takashi Ando, Karthik Balakrishnan, Siyuranga O. Koswatta, Kam‐Leung Lee, J. A. Ott, K. Chan, J. Bruley, Sebastian Engelmann, Vijay Narayanan, E. Leobandung, Renee Mo	2017	6
5	Electron mobility in thin In<inf>0.53</inf>Ga<inf>0.47</inf>As channel E. Cartier, A. Majumdar, K.-T. Lee, Takashi Ando, Martin M. Frank, John Rozen, K.A. Jenkins, Chundong Liang, Chiyu Cheng, J. Bruley, M. Hopstaken, Pranita Kerber, Jeng-Bang Yau, Xiao Sun, R. Mo, Chun-Chen Yeh, E. Leobandung, Vijay Narayanan	2017	2
6	High-mobility High-Ge-Content Si<inf>1−x</inf>Ge<inf>x</inf>-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width Pouya Hashemi, Takashi Ando, Karthik Balakrishnan, J. Bruley, Sebastian Engelmann, J. A. Ott, Vijay Narayanan, D.-G. Park, R. Mo, E. Leobandung	2015	20
7	First demonstration of high-Ge-content strained-Si<inf>1−x</inf>Ge<inf>x</inf> (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and gate lengths for high-performance applications Pouya Hashemi, Karthik Balakrishnan, Sebastian Engelmann, J. A. Ott, A. Khakifirooz, Ashish Baraskar, Marinus Hopstaken, J. Newbury, K. Chan, E. Leobandung, Renee Mo, Dae-Gyu Park	2014	22
8	Strained Si<inf>1−x</inf>Ge<inf>x</inf>-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond Pouya Hashemi, Karthik Balakrishnan, Amlan Majumdar, A. Khakifirooz, Wanki Kim, Ashish Baraskar, Li Yang, Kevin Chan, Sebastian Engelmann, J. A. Ott, D.A. Antoniadis, E. Leobandung, Dae-Gyu Park	2014	16
9	Self-aligned III-V MOSFETs: Towards a CMOS compatible and manufacturable technology solution Yi-Chen Sun, A. Majumdar, Chiyu Cheng, Y.-H. Kim, Uzma Rana, Ryan M. Martin, Robert L. Bruce, Kuen‐Ting Shiu, Yu Zhu, Damon B. Farmer, M. Hopstaken, Eric Joseph, J. P. de Souza, Martin M. Frank, S.-L. Cheng, Masaharu Kobayashi, Elizabeth A. Duch, D. K. Sadana, D.-G. Park, E. Leobandung	2013	10
10	Channel doping impact on FinFETs for 22nm and beyond C.-H. Lin, R. Kambhampati, Robert J. Miller, Terence B. Hook, A. Bryant, Wilfried Haensch, P. Oldiges, Isaac Lauer, T. Yamashita, V. Basker, T. Standaert, K. Rim, E. Leobandung, H. Bu, Mukesh Khare	2012	52
11	Voltage and temperature dependence of random telegraph noise in highly scaled HKMG ETSOI nFETs and its impact on logic delay uncertainty H. Miki, Masanao Yamaoka, D.J. Frank, Kuang-Yu Cheng, D.-G. Park, E. Leobandung, K. Torii	2012	15
12	Modeling of width-quantization-induced variations in logic FinFETs for 22nm and beyond Symposium on VLSI Technology ·Chung-Hsun Lin, Wilfried Haensch, Phil Oldiges, Hailing Wang, R. Williams, Josephine Chang, Michael Guillorn, A. Bryant, Tenko Yamashita, T. Standaert, Huiming Bu, E. Leobandung, Mukesh Khare	2011	22
13	Partially-depleted SOI technology for digital logic G. Shahidi, A. Ajmera, F. Assaderaghi, R. Bolam, E. Leobandung, W. Rausch, D. Sankus, D. Schepis, L. Wagner, Kun Wu, B. Davari	2003	25
14	High performance 0.18 μm SOI CMOS technology E. Leobandung, E. Barth, M. Sherony, Shih-Hsuan Lo, R. Schulz, Wen-Ting Chu, Mukesh Khare, D. K. Sadana, D. Schepis, R. Boiam, I. Sleight, F. White, F. Assaderaghi, D. Moy, G. Biery, R. Goldblan, T.-C. Chen, B. Davari, G. Shahidi	2003	9
15	Scalability of SOI technology into 0.13 μm 1.2 V CMOS generation E. Leobandung, M. Sherony, J.W. Sleight, R. Bolam, F. Assaderaghi, S. Wu, D. Schepis, A. Ajmera, W. Rausch, B. Davari, G. Shahidi	2002	19
16	Si single-electron MOS memory with nanoscale floating-gate and narrow channel Langjie Guo, E. Leobandung, Stephen Y. Chou	2002	5
17	Reduction of short channel effects in SOI MOSFETs with 35 nm channel width and 70 nm channel length E. Leobandung, Stephen Y. Chou	2002	4
18	A 7.9/5.5 psec room/low temperature SOI CMOS F. Assaderaghi, W. Rausch, A. Ajmera, E. Leobandung, D. Schepis, L. Wagner, H.-J. Wann, R. Bolam, D. S. Yee, B. Davari, G. Shahidi	2002	19
19	A partially-depleted SOI compact model - formulation and parameter extraction S.K.H. Fung, L. Wagner, M. Sherony, N. Zamdmer, J.W. Sleight, M. Michel, E. Leobandung, Shih-Hsuan Lo, T.C. Chen, F. Assaderaghi	2002	4
20	A 0.22 /spl mu/m CMOS-SOI technology with a Cu BEOL A. Ajmera, J.W. Sleight, F. Assaderaghi, R. Bolam, A. Bryant, Mark W. Coffey, H.J. Hovel, J. B. Lasky, E. Leobandung, W. Rausch, D. K. Sadana, D. Schepis, L. Wagner, K. Wu, B. Davari, G. Shahidi	1999	5

About E. Leobandung

E. Leobandung is a scholar working on Electrical and Electronic Engineering, Structural Biology, Atomic and Molecular Physics, and Optics, Hardware and Architecture and Condensed Matter Physics, having authored 51 papers that have together received 1.3k indexed citations. Recurring topics across this work include Semiconductor materials and devices (44 papers), Advancements in Semiconductor Devices and Circuit Design (44 papers), Integrated Circuits and Semiconductor Failure Analysis (9 papers), Low-power high-performance VLSI design (8 papers), Quantum and electron transport phenomena (7 papers), Thin-Film Transistor Technologies (7 papers), Ferroelectric and Negative Capacitance Devices (6 papers) and Semiconductor Quantum Structures and Devices (5 papers). The work is most often cited by research in Electrical and Electronic Engineering (1.1k citations), Atomic and Molecular Physics, and Optics (480 citations), Structural Biology (17 citations), Materials Chemistry (363 citations) and Biomedical Engineering (262 citations). E. Leobandung has collaborated with scholars based in United States, Japan and Switzerland. Frequent co-authors include Stephen Y. Chou, L. Jay Guo, Yun Wang, J. A. Ott, Pouya Hashemi, Wilfried Haensch, Karthik Balakrishnan, D.J. Frank, Masanao Yamaoka and Dae-Gyu Park. Their work appears in journals such as IEEE Transactions on Electron Devices, Applied Physics Letters, IEEE Electron Device Letters, Science and Nature Electronics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact