J.W. Sleight

3.0k citations

63 papers · 2.0k indexed · 1 hit paper · h-index 22

Electrical and Electronic Engineering top 2%
- Advancements in Semiconductor Devices and Circuit Design 46
- Semiconductor materials and devices 44
- Integrated Circuits and Semiconductor Failure Analysis 13
- Low-power high-performance VLSI design 5
Hardware and Architecture top 5%
Structural Biology top 10%
Atomic and Molecular Physics, and Optics top 10%
- Quantum and electron transport phenomena 9
- Semiconductor Quantum Structures and Devices 9
Biomedical Engineering top 10%
- Nanowire Synthesis and Applications 12
Condensed Matter Physics
- Physics of Superconductivity and Magnetism 6

Co-authors: L. Šekarić Sarunya Bangsaruntip G. M. Cohen Wilfried Haensch Amlan Majumdar Mark A. Reed M. R. Deshpande David Fried
Cited by: Electrical and Electronic Engineering Hardware and Architecture Structural Biology
Journals: IEEE Electron Device Letters (7 papers)Applied Physics Letters (5 papers)IEEE Transactions on Electron Devices (5 papers)
Partner nations: United States Canada Israel

In The Last Decade

J.W. Sleight

62 papers receiving 1.9k citations

Hit Papers

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Peers

Countries citing papers authored by J.W. Sleight

Since Specialization

Citations

This map shows the geographic impact of J.W. Sleight's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.W. Sleight with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.W. Sleight more than expected).

Fields of papers citing papers by J.W. Sleight

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.W. Sleight. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.W. Sleight. The network helps show where J.W. Sleight may publish in the future.

Co-authorship network

The 25 scholars most cited alongside J.W. Sleight, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with J.W. Sleight Line = papers co-authored together J.W. Sleight links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Quasiparticle tunneling as a probe of Josephson junction barrier and capacitor material in superconducting qubits npj Quantum Information ·Cihan Kurter,Conal E. Murray,R. T. Gordon,Burak Elmas,Martin Sandberg,R. M. Shelby,Andrew Eddins,Vivekananda P. Adiga,A. D. K. Finck,Elmer Ccopa Rivera,Jungwook Bok,سماح المرسي,Brent A. Wacaser,Karthik Balakrishnan,A. Pyzyna,J.W. Sleight,Matthias Steffen,Kenneth P. Rodbell	2022	20
2	Environmental radiation impact on lifetimes and quasiparticle tunneling rates of fixed-frequency transmon qubits Applied Physics Letters ·R. T. Gordon,Conal E. Murray,Cihan Kurter,Martin Sandberg,Shawn A. Hall,Karthik Balakrishnan,R. M. Shelby,Brent A. Wacaser,Jungwook Bok,J.W. Sleight,Markus Brink,Mary Beth Rothwell,Kenneth P. Rodbell,Oliver Dial,Matthias Steffen	2022	37
3	Density scaling with gate-all-around silicon nanowire MOSFETs for the 10 nm node and beyond Sarunya Bangsaruntip,Karthik Balakrishnan,Jason Haskins,Josephine Chang,Markus Brink,Isaac Lauer,Robert L. Bruce,Sebastian Engelmann,A. Pyzyna,G. M. Cohen,Lynne Gignac,Chris Breslin,J. Newbury,D. Klaus,A. Majumdar,J.W. Sleight,Michael Guillorn	2013	79
4	Multiple Double Cross-Section Transmission Electron Microscope Sample Preparation of Specific Sub-10 nm Diameter Si Nanowire Devices Microscopy and Microanalysis ·Lynne Gignac,Ieda Pertuzzati,Sarunya Bangsaruntip,G. M. Cohen,J.W. Sleight	2011	4
5	Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm Sarunya Bangsaruntip,A. Majumdar,G. M. Cohen,Sebastian Engelmann,Y. Zhang,Michael Guillorn,Lynne Gignac,S. Mittal,W. S. Graham,Eric Joseph,D. Klaus,Josephine Chang,E. Cartier,J.W. Sleight	2010	43
6	(Invited) High Performance and Highly Uniform Metal Hi-K Gate-All-Around Silicon Nanowire MOSFETs ECS Transactions ·J.W. Sleight,Sarunya Bangsaruntip,G. M. Cohen,Amlan Majumdar,Ying Zhang,C. SameerDatta,Nicholas Fuller,Lynne Gignac,Ieda Pertuzzati,J. Newbury,Tymon Barwicz,Martin M. Frank,Michael Guillorn	2010	1
7	High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling Sarunya Bangsaruntip,G. M. Cohen,A. Majumdar,Y. Zhang,Elisa López - Rubio,Nicholas Fuller,Lynne Gignac,S. Mittal,J. Newbury,Michael Guillorn,Tymon Barwicz,L. Šekarić,Martin M. Frank,J.W. Sleight	2009	239
8	Upside-down FETS Douglas Charles La Tulipe,高田公義,S.E. Steen,Anna W. Topol,J. Patel,马国杰,J.W. Sleight	2008	1
9	Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths Thayanne Gabrielly Ribeiro De Souza,J.W. Sleight,J. M. Hergenrother,Chris William McKindsey,K.A. Jenkins,O. Dokumaci,Remziye Koç,Josephine Chang,Hiroki Nakayama,D. Chidambarrao,Miguel Ángel Bello García,K. Zalewski,W. Natzle,James Parrish,Jazmin El-Hakeh,J. A. Ott,M. Ieong,Wilfried Haensch	2006	11
10	Challenges and Opportunities for High Performance 32 nm CMOS Technology J.W. Sleight,Isaac Lauer,O. Dokumaci,David Fried,Dechao Guo,Bala Haran,Tosihide H. YOSIDA,C. Sheraw,Thayanne Gabrielly Ribeiro De Souza,О. Н. Горшков,X. Wang,P. Oldiges,D. K. Sadana,C.Y. Sung,Wilfried Haensch,Mukesh Khare	2006	36
11	Highly manufacturable 40-50 GHz VCOs in a 120 nm system-on-chip SOI technology Jonghae Kim,Jean‐Olivier Plouchart,N. Zamdmer,N. Fong,M. Sherony,Yue Tan,Mohammed Talbi,Robert Trzcinski,John Safran,Ramalingam Anuja,Mohamed Shabaan Atrees,J.W. Sleight,C. Sheraw,A. Ray,L. Wagner	2004	5
12	Scalability of SOI technology into 0.13 μm 1.2 V CMOS generation E. Leobandung,M. Sherony,J.W. Sleight,R. Bolam,F. Assaderaghi,Julie Cameron,D. Schepis,A. Ajmera,W. Rausch,B. Davari,G. Shahidi	2002	19
13	A partially-depleted SOI compact model - formulation and parameter extraction S.K.H. Fung,L. Wagner,M. Sherony,N. Zamdmer,J.W. Sleight,M. Michel,E. Leobandung,Helnaria Fermi Pandelisman,Alain Sebe,F. Assaderaghi	2002	4
14	A continuous compact MOSFET model for SOI with automatic transitions between fully and partially depleted device behavior J.W. Sleight,R. Rios	2002	3
15	High performance sub-40 nm CMOS devices on SOI for the 70 nm technology node Tosihide H. YOSIDA,A. Ajmera,Babusingh S Yadav,D. Schepis,N. Zamdmer,K.A. Jenkins,Jean‐Olivier Plouchart,L.A. Mamontova,H. Abdolmaleki,J. Bruley,B. Doris,J.W. Sleight,S.K.H. Fung,K.A. Furunes,A. Mocuta,Insoon Yang,ГАРАСАЕВ А.М.,K.P. Müller,P. Agnello,J.J. Welser	2002	21
16	A 0.22 /spl mu/m CMOS-SOI technology with a Cu BEOL A. Ajmera,J.W. Sleight,F. Assaderaghi,R. Bolam,A. Bryant,Mark W. Coffey,H.J. Hovel,J. B. Lasky,E. Leobandung,W. Rausch,D. K. Sadana,D. Schepis,L. Wagner,Wencheng Han,B. Davari,G. Shahidi	1999	5
17	DC and transient characterization of a compact Schottky body contact technology for SOI transistors IEEE Transactions on Electron Devices ·J.W. Sleight,K. Mistry	1999	5
18	Atomic force microscopy study of electron beam written contamination structures Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena ·M. Amman,J.W. Sleight,Tianao Wang,Roger E. Welser,M. R. Deshpande,Mark A. Reed,L. J. Guido	1996	43
19	Fluctuation Effects on a Strongly Pinned Vortex Lattice in a Thin Type-II Superconducting Wire Physical Review Letters ·Xinsheng Ling,Danchun Zhou,Nicholas D. Rizzo,J.W. Sleight,D. E. Prober,L.R. Motowidlo,B. A. Zeitlin	1995	12
20	Low-dimensional resonant tunnelling and Coulomb blockade: a comparison of fabricated versus impurity confinement Semiconductor Science and Technology ·M. R. Deshpande,Babol,P. Kozodoy,Nynke H. Dekker,J.W. Sleight,Mark A. Reed,O. HALYCH,William R. Frensley	1994	9

About J.W. Sleight

J.W. Sleight is a scholar working on Electrical and Electronic Engineering, Structural Biology, Atomic and Molecular Physics, and Optics, Condensed Matter Physics and Biomedical Engineering, having authored 63 papers that have together received 2.0k indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (46 papers), Semiconductor materials and devices (44 papers), Integrated Circuits and Semiconductor Failure Analysis (13 papers), Nanowire Synthesis and Applications (12 papers), Quantum and electron transport phenomena (9 papers), Semiconductor Quantum Structures and Devices (9 papers), Physics of Superconductivity and Magnetism (6 papers) and Low-power high-performance VLSI design (5 papers). The work is most often cited by research in Electrical and Electronic Engineering (1.7k citations), Hardware and Architecture (119 citations), Structural Biology (22 citations), Atomic and Molecular Physics, and Optics (333 citations) and Biomedical Engineering (457 citations). J.W. Sleight has collaborated with scholars based in United States, Canada and Israel. Frequent co-authors include L. Šekarić, Sarunya Bangsaruntip, G. M. Cohen, Wilfried Haensch, Amlan Majumdar, Mark A. Reed, M. R. Deshpande, David Fried, J. M. Hergenrother and R.H. Dennard. Their work appears in journals such as IEEE Electron Device Letters, Applied Physics Letters, IEEE Transactions on Electron Devices, Physical review. B, Condensed matter and Microscopy and Microanalysis.

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