Yuan Taur
About
In The Last Decade
Yuan Taur
159 papers receiving 9.3k citations
Hit Papers
Peers
Comparison fields: 5 of 79
- Electrical and Electronic Engineering 9.5k
- Biomedical Engineering 1.5k
- Materials Chemistry 1.1k
- Atomic and Molecular Physics, and Optics 1.1k
- Hardware and Architecture 224
Countries citing papers authored by Yuan Taur
This map shows the geographic impact of Yuan Taur's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yuan Taur with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yuan Taur more than expected).
Fields of papers citing papers by Yuan Taur
This network shows the impact of papers produced by Yuan Taur. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yuan Taur. The network helps show where Yuan Taur may publish in the future.
Co-authorship network of co-authors of Yuan Taur
This figure shows the co-authorship network connecting the top 25 collaborators of Yuan Taur. A scholar is included among the top collaborators of Yuan Taur based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yuan Taur. Yuan Taur is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 22 | |
| 3 | Impact of carrier lifetime on Z 2 -FET operation | 2 |
| 4 | 7 | |
| 5 | 71 | |
| 6 | 45 | |
| 7 | Fundamentals of Modern VLSI Devices breakdown → | 1340 |
| 8 | 118 | |
| 9 | 25 | |
| 10 | 151 | |
| 11 | 1 | |
| 12 | 1 | |
| 13 | 139 | |
| 14 | 13 | |
| 15 | 11 | |
| 16 | Study of boron penetration through thin oxide with p+-polysilicon gate | 28 |
| 17 | Doping of n+ and p+ polysilicon in a dual-gate CMOS process | 45 |
| 18 | Submicron Tungsten Gate MOSFET with 10 nm Gate Oxide | 6 |
| 19 | 0.5 μm CMOS Device Design and Characterization | 1 |
| 20 | 47 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.