Kaushik Roy
Impact in
- Hardware and Architecture top 0.01%
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
- Electrical and Electronic Engineering top 0.02%
- Low-power high-performance VLSI design
- Advanced Memory and Neural Computing
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Ferroelectric and Negative Capacitance Devices
- VLSI and FPGA Design Techniques
Papers in
-
- Low-power high-performance VLSI design 381
- Advancements in Semiconductor Devices and Circuit Design 350
- Semiconductor materials and devices 310
- Advanced Memory and Neural Computing 274
- Ferroelectric and Negative Capacitance Devices 240
- Integrated Circuits and Semiconductor Failure Analysis 120
-
- VLSI and Analog Circuit Testing 153
- Co-authors
- Anand Raghunathan (87 shared papers)Hamid Mahmoodi (54 shared papers)Priyadarshini Panda (41 shared papers)Akhilesh Jaiswal (30 shared papers)Subhas Chandra Mukhopadhyay (18 shared papers)Saibal Mukhopadhyay (38 shared papers)Bipul C. Paul (34 shared papers)Abhronil Sengupta (45 shared papers)
- Journals
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems (68 papers)IEEE Transactions on Electron Devices (54 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (33 papers)IEEE Electron Device Letters (15 papers)IEEE Journal of Solid-State Circuits (14 papers)
- Partner nations
- United StatesSouth KoreaIndia
In The Last Decade
Kaushik Roy
1.0k papers receiving 34.1k citations
Kaushik Roy's Hit Papers
Peers
Comparison fields: 5 of 157
- Hardware and Architecture 9.2k
- Electrical and Electronic Engineering 31.1k
- Computer Networks and Communications 3.0k
- Cognitive Neuroscience 2.1k
- Artificial Intelligence 3.8k
Countries citing papers authored by Kaushik Roy
This map shows the geographic impact of Kaushik Roy's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kaushik Roy with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kaushik Roy more than expected).
Fields of papers citing papers by Kaushik Roy
This network shows the impact of papers produced by Kaushik Roy. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kaushik Roy. The network helps show where Kaushik Roy may publish in the future.
Co-authors
The 25 scholars most cited alongside Kaushik Roy, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
Showing the 20 most-cited of 1.1k papers — load more, or switch the sort, to bring in the rest.
| # | Work | ||
|---|---|---|---|
| 1 | Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits Hit paper breakdown → | 2003 | 1754 |
| 2 | Towards spike-based machine intelligence with neuromorphic computing Hit paper breakdown → | 2019 | 1458 |
| 3 | Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates Hit paper breakdown → | 2008 | 984 |
| 4 | Low-Power Digital Signal Processing Using Approximate Adders Hit paper breakdown → | 2012 | 643 |
| 5 | Gated-Vdd Hit paper breakdown → | 2000 | 535 |
| 6 | Analysis and characterization of inherent application resilience for approximate computing Hit paper breakdown → | 2013 | 420 |
| 7 | A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM Hit paper breakdown → | 2007 | 402 |
| 8 | Low power CMOS VLSI circuit design | 2000 | 396 |
| 9 | Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS Hit paper breakdown → | 2005 | 381 |
| 10 | Enabling Spike-Based Backpropagation for Training Deep Neural Network Architectures Hit paper breakdown → | 2020 | 313 |
| 11 | 2011 | 309 | |
| 12 | 2019 | 299 | |
| 13 | 2012 | 281 | |
| 14 | 2017 | 276 | |
| 15 | 1998 | 267 | |
| 16 | 2011 | 255 | |
| 17 | 2005 | 240 | |
| 18 | 2001 | 229 | |
| 19 | 2020 | 228 | |
| 20 | 2018 | 226 |
About Kaushik Roy
Kaushik Roy is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Atomic and Molecular Physics, and Optics, Artificial Intelligence and Biomedical Engineering, having authored 1.1k papers that have together received 35.9k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (381 papers), Advancements in Semiconductor Devices and Circuit Design (350 papers), Semiconductor materials and devices (310 papers), Advanced Memory and Neural Computing (274 papers), Ferroelectric and Negative Capacitance Devices (240 papers), VLSI and Analog Circuit Testing (153 papers), Magnetic properties of thin films (122 papers) and Integrated Circuits and Semiconductor Failure Analysis (120 papers). The work is most often cited by research in Hardware and Architecture (9.2k citations), Electrical and Electronic Engineering (31.1k citations), Computer Networks and Communications (3.0k citations), Cognitive Neuroscience (2.1k citations) and Artificial Intelligence (3.8k citations). Kaushik Roy has collaborated with scholars based in United States, South Korea and India. Frequent co-authors include Anand Raghunathan, Hamid Mahmoodi, Priyadarshini Panda, Akhilesh Jaiswal, Subhas Chandra Mukhopadhyay, Saibal Mukhopadhyay, Bipul C. Paul, Abhronil Sengupta, Jaydeep P. Kulkarni and Arijit Raychowdhury. Their work appears in journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Electron Devices, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Electron Device Letters and IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.