Kaushik Nayak

577 citations

29 papers · 448 indexed · h-index 12

Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices 22
- Advancements in Semiconductor Devices and Circuit Design 21
- Silicon Carbide Semiconductor Technologies 10
- Ferroelectric and Negative Capacitance Devices 3
Biomedical Engineering
- Nanowire Synthesis and Applications 4
Materials Chemistry
- Thermal properties of materials 3
- Diamond and Carbon-based Materials Research 3
- 2D Materials and Applications 3
Atomic and Molecular Physics, and Optics
Hardware and Architecture

Co-authors: V. Ramgopal Rao Mohit Bajaj Bharat Bhushan Valipe Ramgopal Rao K. V. R. M. Murali Samarth Agarwal P. Oldiges Shiv Govind Singh
Cited by: Electrical and Electronic Engineering Biomedical Engineering Materials Chemistry
Journals: IEEE Transactions on Electron Devices (12 papers)Thin Solid Films (1 paper)Physics Letters A (1 paper)
Partner nations: India United States Japan

In The Last Decade

Kaushik Nayak

25 papers receiving 430 citations

Peers

Countries citing papers authored by Kaushik Nayak

Since Specialization

Citations

This map shows the geographic impact of Kaushik Nayak's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kaushik Nayak with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kaushik Nayak more than expected).

Fields of papers citing papers by Kaushik Nayak

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kaushik Nayak. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kaushik Nayak. The network helps show where Kaushik Nayak may publish in the future.

Co-authorship network

The 20 scholars most cited alongside Kaushik Nayak, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Kaushik Nayak Line = papers co-authored together Kaushik Nayak links everyone, so they are left out of the graph.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work
1	Investigation of X-Ray Irradiance Hardness and High Temperature Operation of H-Terminated Diamond MOSFET IEEE Transactions on Electron Devices ·Yerragudi Pullaiah,Mohit Bajaj,Kaushik Nayak	2024	1
2	Contact Analysis of Elemental Transition Metal Electrodes for Complementary 2D-FET Applications Using MoS₂ and WSe₂ IEEE Electron Device Letters ·Kumar Prashant,Kaushik Nayak	2022	0
3	TCAD Analysis of O-Terminated Diamond m-i-p⁺ Diode Characteristics Dependencies on Surface States CNL and Metal-Induced Gap States IEEE Transactions on Electron Devices ·Yerragudi Pullaiah,Mohit Bajaj,Oves Badami,Kaushik Nayak	2021	2
4	TCAD-Based Investigation of Statistical Variability Immunity in U-Channel FDSOI n-MOSFET for Sub-7-nm Technology IEEE Transactions on Electron Devices ·Akhil Sudarsanan,Kaushik Nayak	2021	6
5	Electro-Thermal Performance Boosting in Stacked Si Gate-all-Around Nanosheet FET With Engineered Source/Drain Contacts IEEE Transactions on Electron Devices ·Sankatali Venkateswarlu,Oves Badami,Kaushik Nayak	2021	27
6	Electrode Orientation Dependent Transition Metal—(MoS₂; WS₂) Contact Analysis for 2D Material Based FET Applications IEEE Electron Device Letters ·Kumar Prashant,Dinesh C. Gupta,Yerragudi Pullaiah,Oves Badami,Kaushik Nayak	2021	5
7	Superior Interface Trap Variability Immunity of Horizontally Stacked Si Nanosheet FET in Sub-3-nm Technology Node Akhil Sudarsanan,Oves Badami,Kaushik Nayak	2021	4
8	Immunity to random fluctuations induced by interface trap variability in Si gate-all-around n-nanowire field-effect transistor devices Journal of Computational Electronics ·Akhil Sudarsanan,Kaushik Nayak	2021	6
9	Hetero-Interfacial Thermal Resistance Effects on Device Performance of Stacked Gate-All-Around Nanosheet FET IEEE Transactions on Electron Devices ·Sankatali Venkateswarlu,Kaushik Nayak	2020	34
10	Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si CMOS Logic Circuit Performance in N-14 to N-7 Scaled Technologies IEEE Transactions on Electron Devices ·Sankatali Venkateswarlu,Kaushik Nayak	2020	17
11	Device Electrostatics and High Temperature Operation of Oxygen Terminated Boron Doped Diamond MOS Capacitor and MOSFET Yerragudi Pullaiah,Naresh Kumar Emani,Kaushik Nayak	2020	3
12	Atomistic Modeling to Engineer Ohmic Contacts between Monolayer MoS₂ and Transition Metals Kumar Prashant,Yerragudi Pullaiah,Dinesh C. Gupta,Kaushik Nayak	2020	2
13	Impact of Fin Line Edge Roughness and Metal Gate Granularity on Variability of 10-nm Node SOI n-FinFET IEEE Transactions on Electron Devices ·Akhil Sudarsanan,Sankatali Venkateswarlu,Kaushik Nayak	2019	27
14	Improved Electro-Thermal Performance in FinFETs using SOD Technology for 7nm node High Performance Logic Devices Sankatali Venkateswarlu,Akhil Sudarsanan,Kaushik Nayak	2019	1
15	Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si n-FinFET Performance IEEE Transactions on Electron Devices ·Sankatali Venkateswarlu,Akhil Sudarsanan,Shiv Govind Singh,Kaushik Nayak	2018	40
16	Effect of Metal Gate Granularity Induced Random Fluctuations on Si Gate-All-Around Nanowire MOSFET 6-T SRAM Cell Stability IEEE Transactions on Nanotechnology ·Mohit Bajaj,Kaushik Nayak,Suresh Gundapaneni,Valipe Ramgopal Rao	2016	11
17	CMOS Logic Device and Circuit Performance of Si Gate All Around Nanowire MOSFET IEEE Transactions on Electron Devices ·Kaushik Nayak,Mohit Bajaj,Aniruddha Konar,P. Oldiges,Kenji Natori,Hiroshi Iwai,K. V. R. M. Murali,Valipe Ramgopal Rao	2014	58
18	Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs IEEE Transactions on Electron Devices ·Kaushik Nayak,Samarth Agarwal,Mohit Bajaj,P. Oldiges,K. V. R. M. Murali,Valipe Ramgopal Rao	2014	32
19	DC Compact Model for SOI Tunnel Field-Effect Transistors IEEE Transactions on Electron Devices ·Bharat Bhushan,Kaushik Nayak,V. Ramgopal Rao	2012	76
20	Metallated Porphyrin Self Assembled Monolayers as Cu Diffusion Barriers for the Nano-Scale CMOS Technologies DSpace (IIT Bombay) ·Mrunal A. Khaderbad,Kaushik Nayak,Yedukondalu Meesala,Mangalampalli Ravikanth,Soumyo Mukherji,V. Ramgopal Rao	2008	11

About Kaushik Nayak

Kaushik Nayak is a scholar working on Electrical and Electronic Engineering, Materials Chemistry and Biomedical Engineering, having authored 29 papers that have together received 448 indexed citations. Recurring topics across this work include Semiconductor materials and devices (22 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers), Silicon Carbide Semiconductor Technologies (10 papers), Nanowire Synthesis and Applications (4 papers), Thermal properties of materials (3 papers), Diamond and Carbon-based Materials Research (3 papers), Ferroelectric and Negative Capacitance Devices (3 papers) and 2D Materials and Applications (3 papers). The work is most often cited by research in Electrical and Electronic Engineering (430 citations), Biomedical Engineering (81 citations) and Materials Chemistry (63 citations). Kaushik Nayak has collaborated with scholars based in India, United States and Japan. Frequent co-authors include V. Ramgopal Rao, Mohit Bajaj, Bharat Bhushan, Valipe Ramgopal Rao, K. V. R. M. Murali, Samarth Agarwal, P. Oldiges, Shiv Govind Singh, Aniruddha Konar and Hiroshi Iwai. Their work appears in journals such as IEEE Transactions on Electron Devices, Thin Solid Films and Physics Letters A.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact