P. Parries
- Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing 3
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- Interconnection Networks and Systems 3
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- Semiconductor materials and devices 16
- Advancements in Semiconductor Devices and Circuit Design 15
- Low-power high-performance VLSI design 10
- Integrated Circuits and Semiconductor Failure Analysis 3
- Ferroelectric and Negative Capacitance Devices 2
- Advanced Memory and Neural Computing 1
P. Parries
18 papers receiving 253 citations
Peers
Comparison fields: 5 of 20
- Hardware and Architecture 114
- Computer Networks and Communications 95
- Electrical and Electronic Engineering 230
- Biomedical Engineering 19
- Automotive Engineering 4
Countries citing papers authored by P. Parries
This map shows the geographic impact of P. Parries's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Parries with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Parries more than expected).
Fields of papers citing papers by P. Parries
This network shows the impact of papers produced by P. Parries. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Parries. The network helps show where P. Parries may publish in the future.
Co-authorship network
The 25 scholars most cited alongside P. Parries, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2018 | 9 | |
| 2 | 2018 | 3 | |
| 3 | 2015 | 3 | |
| 4 | 2012 | 9 | |
| 5 | 2011 | 13 | |
| 6 | 2008 | 18 | |
| 7 | 2008 | 47 | |
| 8 | 2008 | 4 | |
| 9 | 2008 | 25 | |
| 10 | 2008 | 1 | |
| 11 | 2007 | 26 | |
| 12 | 2005 | 53 | |
| 13 | 2005 | 2 | |
| 14 | 2005 | 35 | |
| 15 | 2004 | 3 | |
| 16 | 2004 | 8 | |
| 17 | 2003 | 5 | |
| 18 | 2003 | 0 | |
| 19 | 2002 | 9 |
About P. Parries
P. Parries is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications, having authored 19 papers that have together received 273 indexed citations. Recurring topics across this work include Semiconductor materials and devices (16 papers), Advancements in Semiconductor Devices and Circuit Design (15 papers), Low-power high-performance VLSI design (10 papers), Interconnection Networks and Systems (3 papers), Integrated Circuits and Semiconductor Failure Analysis (3 papers), VLSI and Analog Circuit Testing (3 papers), Ferroelectric and Negative Capacitance Devices (2 papers) and Advanced Memory and Neural Computing (1 paper). The work is most often cited by research in Hardware and Architecture (114 citations), Computer Networks and Communications (95 citations) and Electrical and Electronic Engineering (230 citations). P. Parries has collaborated with scholars based in United States and Canada. Frequent co-authors include Subramanian S. Iyer, J. Barth, John Golz, D. Hoyniak, T. Kirihata, Weiran Kong, B. Khan, S.E. Schuster, Hillery C. Hunter and Hoki Kim. Their work appears in journals such as IBM Journal of Research and Development and IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.