D. Ayers
- Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques 11
- Embedded Systems Design Techniques 5
- Network Packet Processing and Optimization 1
-
- Interconnection Networks and Systems 1
- Advanced Data Storage Technologies 1
-
- Low-power high-performance VLSI design 11
- Advancements in Semiconductor Devices and Circuit Design 4
- Semiconductor materials and devices 4
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Journal of Solid-State Circuits (3 papers)IEEE Design & Test of Computers (1 paper)
- Partner nations
- United StatesUnited Kingdom
In The Last Decade
D. Ayers
12 papers receiving 384 citations
Peers
Comparison fields: 5 of 18
- Hardware and Architecture 267
- Computer Networks and Communications 147
- Electrical and Electronic Engineering 314
- Information Systems 14
- Biomedical Engineering 14
Countries citing papers authored by D. Ayers
This map shows the geographic impact of D. Ayers's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Ayers with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Ayers more than expected).
Fields of papers citing papers by D. Ayers
This network shows the impact of papers produced by D. Ayers. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Ayers. The network helps show where D. Ayers may publish in the future.
Co-authorship network
The 16 scholars most cited alongside D. Ayers, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2014 | 27 | |
| 2 | 2014 | 6 | |
| 3 | 2010 | 92 | |
| 4 | 2010 | 4 | |
| 5 | 2009 | 6 | |
| 6 | 2009 | 19 | |
| 7 | 2009 | 26 | |
| 8 | 2007 | 77 | |
| 9 | 2006 | 8 | |
| 10 | 2006 | 63 | |
| 11 | 2004 | 73 | |
| 12 | 2003 | 7 | |
| 13 | 2002 | 0 |
About D. Ayers
D. Ayers is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Computer Networks and Communications, Infectious Diseases and Organic Chemistry, having authored 13 papers that have together received 408 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (11 papers), Parallel Computing and Optimization Techniques (11 papers), Embedded Systems Design Techniques (5 papers), Advancements in Semiconductor Devices and Circuit Design (4 papers), Semiconductor materials and devices (4 papers), Network Packet Processing and Optimization (1 paper), Interconnection Networks and Systems (1 paper) and Advanced Data Storage Technologies (1 paper). The work is most often cited by research in Hardware and Architecture (267 citations), Computer Networks and Communications (147 citations), Electrical and Electronic Engineering (314 citations), Information Systems (14 citations) and Biomedical Engineering (14 citations). D. Ayers has collaborated with scholars based in United States and United Kingdom. Frequent co-authors include Simon Tam, Stefan Rusu, H. Muljono, J. Chang, Ed Grochowski, Vivek Tiwari, B.S. Cherkauer, Wei Chen, Aaron D. Martin and Eddie Wang. Their work appears in journals such as IEEE Journal of Solid-State Circuits and IEEE Design & Test of Computers.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.