G. Bronner

927 total citations
33 papers, 395 citations indexed

About

G. Bronner is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, G. Bronner has authored 33 papers receiving a total of 395 indexed citations (citations by other indexed papers that have themselves been cited), including 32 papers in Electrical and Electronic Engineering, 3 papers in Electronic, Optical and Magnetic Materials and 2 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in G. Bronner's work include Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Ferroelectric and Negative Capacitance Devices (9 papers). G. Bronner is often cited by papers focused on Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Ferroelectric and Negative Capacitance Devices (9 papers). G. Bronner collaborates with scholars based in United States, Germany and China. G. Bronner's co-authors include R.H. Dennard, R. Divakaruni, J. Mandelman, Y. Li, J. DeBrosse, C. Radens, J.D. Plummer, John E. Lewis, M. Liehr and Huaqiang Wu and has published in prestigious journals such as Applied Physics Letters, IEEE Journal of Solid-State Circuits and IEEE Transactions on Electron Devices.

In The Last Decade

G. Bronner

29 papers receiving 381 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
G. Bronner United States 9 345 84 71 45 36 33 395
R. Divakaruni United States 10 306 0.9× 82 1.0× 68 1.0× 33 0.7× 17 0.5× 35 358
J. Mandelman United States 8 263 0.8× 76 0.9× 64 0.9× 24 0.5× 15 0.4× 20 323
Shih‐Hung Chen Belgium 13 461 1.3× 58 0.7× 81 1.1× 27 0.6× 27 0.8× 89 516
Kirk Prall United States 6 347 1.0× 34 0.4× 104 1.5× 57 1.3× 14 0.4× 16 397
G Calvi Italy 3 242 0.7× 132 1.6× 132 1.9× 140 3.1× 15 0.4× 3 341
Xueti Tang United States 3 261 0.8× 122 1.5× 145 2.0× 87 1.9× 193 5.4× 5 458
Hideaki Aochi Japan 9 456 1.3× 52 0.6× 259 3.6× 56 1.2× 37 1.0× 12 536
Jeong-Hyuk Choi South Korea 10 436 1.3× 50 0.6× 225 3.2× 104 2.3× 37 1.0× 28 527
H. Aochi Japan 5 446 1.3× 39 0.5× 183 2.6× 68 1.5× 33 0.9× 9 521
A. Fazio United States 8 271 0.8× 42 0.5× 151 2.1× 56 1.2× 19 0.5× 14 344

Countries citing papers authored by G. Bronner

Since Specialization
Citations

This map shows the geographic impact of G. Bronner's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Bronner with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Bronner more than expected).

Fields of papers citing papers by G. Bronner

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by G. Bronner. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Bronner. The network helps show where G. Bronner may publish in the future.

Co-authorship network of co-authors of G. Bronner

This figure shows the co-authorship network connecting the top 25 collaborators of G. Bronner. A scholar is included among the top collaborators of G. Bronner based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with G. Bronner. G. Bronner is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Wang, Chen, Huaqiang Wu, Bin Gao, et al.. (2015). Relaxation Effect in RRAM Arrays: Demonstration and Characteristics. IEEE Electron Device Letters. 37(2). 182–185. 38 indexed citations
2.
Stiffler, S. R., P. Agnello, T. Ivers, et al.. (2007). Optimization of silicon technology for the IBM System z9. IBM Journal of Research and Development. 51(1.2). 5–18. 3 indexed citations
3.
Bronner, G.. (2004). Scaling trends in DRAM technology. 19–19. 2 indexed citations
4.
Knorr, Andreas, et al.. (2004). Vertically Self-Aligned Buried Junction Formation for Ultrahigh-Density DRAM Applications. IEEE Electron Device Letters. 25(5). 259–261.
5.
Chidambarrao, D., K. McStay, R. Divakaruni, et al.. (2004). On the retention time distribution of dual-channel vertical DRAM technologies. 243–246. 2 indexed citations
6.
Li, Y., J. Mandelman, P. Parries, et al.. (2003). Array pass transistor design in trench cell for Gbit DRAM and beyond. 251–254. 5 indexed citations
7.
McStay, K., D. Chidambarrao, J. Mandelman, et al.. (2003). Vertical pass transistor design for sub-100 nm DRAM technologies. 180–181. 2 indexed citations
8.
Divakaruni, R., et al.. (2003). Gate prespacers for high density DRAMs. 255–257. 2 indexed citations
9.
Weinberg, Z. A., G. Bronner, P.A. McFarland, et al.. (2002). Trench storage capacitors for high density DRAMs. 835–838. 5 indexed citations
10.
Crowder, S., S. R. Stiffler, P. Parries, et al.. (2002). Trade-offs in the integration of high performance devices with trench capacitor DRAM. 45–48. 9 indexed citations
11.
Shahidi, G., B. Davari, Yuan Taur, et al.. (2002). Fabrication of CMOS on ultrathin SOI obtained by epitaxial lateral overgrowth and chemical-mechanical polishing. 587–590. 7 indexed citations
12.
Inaba, S., Ryoichi Katsumata, R. Rengarajan, et al.. (2002). Threshold voltage roll-up/roll-off characteristic control in sub-0.2-μm single workfunction gate CMOS for high-performance DRAM applications. IEEE Transactions on Electron Devices. 49(2). 308–313. 2 indexed citations
13.
Mandelman, J., R.H. Dennard, G. Bronner, et al.. (2002). Challenges and future directions for the scaling of dynamic random-access memory (DRAM). IBM Journal of Research and Development. 46(2.3). 187–212. 183 indexed citations
14.
Nesbit, L., J. DeBrosse, M. Gall, et al.. (2002). A 0.6 μm/sup 2/ 256 Mb trench DRAM cell with self-aligned BuriEd STrap (BEST). 627–630. 6 indexed citations
16.
Schnabel, R., G. Bronner, L. A. Clevenger, et al.. (1999). Slotted vias for dual damascene interconnects in 1 Gb DRAMs. 43–44. 2 indexed citations
17.
Burghartz, Joachim N., et al.. (1990). Selective epitaxial growth of silicon and some potential applications. IBM Journal of Research and Development. 34(6). 816–827. 18 indexed citations
18.
Lu, Nicky, G. Bronner, Koji Kitamura, et al.. (1989). A 22-ns 1-Mbit CMOS high-speed DRAM with address multiplexing. IEEE Journal of Solid-State Circuits. 24(5). 1198–1205. 14 indexed citations
19.
Bronner, G. & J.D. Plummer. (1984). Characterization of transient process phenomena using a temperature-tolerant metallurgy. IEEE Electron Device Letters. 5(3). 75–77. 2 indexed citations
20.
Bronner, G., et al.. (1981). FED control power. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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