J. Cai

1.3k total citations
27 papers, 573 citations indexed

About

J. Cai is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, J. Cai has authored 27 papers receiving a total of 573 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 3 papers in Biomedical Engineering and 2 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in J. Cai's work include Advancements in Semiconductor Devices and Circuit Design (25 papers), Semiconductor materials and devices (25 papers) and Integrated Circuits and Semiconductor Failure Analysis (6 papers). J. Cai is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (25 papers), Semiconductor materials and devices (25 papers) and Integrated Circuits and Semiconductor Failure Analysis (6 papers). J. Cai collaborates with scholars based in United States, Taiwan and Switzerland. J. Cai's co-authors include Wilfried Haensch, E. Nowak, C. T. Sah, K. Rim, Tosihide H. YOSIDA, A. Mocuta, R.H. Dennard, M. Immediato, W.K. Luk and Stephen Kosonocky and has published in prestigious journals such as Journal of Applied Physics, IEEE Transactions on Electron Devices and Journal of Travel Research.

In The Last Decade

J. Cai

27 papers receiving 547 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
J. Cai United States 11 543 82 48 40 39 27 573
Campbell Millar United Kingdom 14 567 1.0× 53 0.6× 33 0.7× 75 1.9× 26 0.7× 44 600
N. Lindert United States 12 790 1.5× 111 1.4× 45 0.9× 46 1.1× 45 1.2× 16 823
Navid Paydavosi United States 14 465 0.9× 64 0.8× 84 1.8× 27 0.7× 41 1.1× 22 496
B. Kleveland United States 11 460 0.8× 52 0.6× 22 0.5× 47 1.2× 35 0.9× 24 480
Narain Arora Germany 8 566 1.0× 82 1.0× 39 0.8× 23 0.6× 41 1.1× 15 579
Toshiyuki Tsutsumi Japan 10 395 0.7× 64 0.8× 25 0.5× 78 1.9× 30 0.8× 63 430
Ming-Long Fan Taiwan 15 677 1.2× 72 0.9× 27 0.6× 31 0.8× 16 0.4× 64 687
C. Kuo United States 5 499 0.9× 74 0.9× 29 0.6× 19 0.5× 29 0.7× 9 516
Weiran Kong China 10 211 0.4× 30 0.4× 37 0.8× 41 1.0× 24 0.6× 30 239
M. Kajita Japan 12 450 0.8× 93 1.1× 13 0.3× 60 1.5× 117 3.0× 30 464

Countries citing papers authored by J. Cai

Since Specialization
Citations

This map shows the geographic impact of J. Cai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Cai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Cai more than expected).

Fields of papers citing papers by J. Cai

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Cai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Cai. The network helps show where J. Cai may publish in the future.

Co-authorship network of co-authors of J. Cai

This figure shows the co-authorship network connecting the top 25 collaborators of J. Cai. A scholar is included among the top collaborators of J. Cai based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Cai. J. Cai is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Mukhopadhyay, Subhadeep, Win-San Khwa, P. J. Liao, et al.. (2020). Cold CMOS as a Power-Performance-Reliability Booster for Advanced FinFETs. 1–2. 51 indexed citations
2.
Pitner, Gregory, Zichen Zhang, Qing Lin, et al.. (2020). Sub-0.5 nm Interfacial Dielectric Enables Superior Electrostatics: 65 mV/dec Top-Gated Carbon Nanotube FETs at 15 nm Gate Length. 3.5.1–3.5.4. 27 indexed citations
3.
Yau, Jeng-Bang, J. Cai, Pouya Hashemi, et al.. (2017). A study of process-related electrical defects in SOI lateral bipolar transistors fabricated by ion implantation. Journal of Applied Physics. 123(16). 3 indexed citations
4.
Yau, Jeng-Bang, J. Cai, T.H. Ning, et al.. (2016). Ge-on-insulator lateral bipolar transistors. 8. 130–133. 1 indexed citations
5.
Khakifirooz, A., Kangguo Cheng, Toshiharu Nagumo, et al.. (2012). Extremely thin SOI for system-on-chip applications. 1–4. 4 indexed citations
6.
Solomon, P. M., Isaac Lauer, A. Majumdar, et al.. (2011). Effect of Uniaxial Strain on the Drain Current of a Heterojunction Tunneling Field-Effect Transistor. IEEE Electron Device Letters. 32(4). 464–466. 15 indexed citations
7.
Khater, Marwan, J. Cai, R.H. Dennard, et al.. (2010). FDSOI CMOS with dielectrically-isolated back gates and 30nm L<inf>G</inf> high-&#x03B3;/metal gate. 43–44. 3 indexed citations
8.
Oldiges, Phil, Kenneth P. Rodbell, T.H. Ning, et al.. (2010). Stacked devices for SEU immune design. 1–2. 6 indexed citations
9.
Tega, Naoki, Hiroshi Miki, Zhibin Ren, et al.. (2009). Reduction of random telegraph noise in High-&#x043A; / metal-gate stacks for 22 nm generation FETs. 1–4. 20 indexed citations
10.
Parries, P., K. Cheng, K. Amarnath, et al.. (2008). Access Transistor Design and Optimization for 65/45nm High Performance SOI eDRAM. 97–98. 1 indexed citations
11.
Cohen, G. M., Sarunya Bangsaruntip, Steven J. Laux, et al.. (2008). Measurements of carrier transport in MOSFETs with bottom-up nanowire channel as a function of the nanowire diameter. 187–188. 3 indexed citations
12.
Luk, W.K., J. Cai, R.H. Dennard, M. Immediato, & Stephen Kosonocky. (2006). A 3-Transistor DRAM Cell with Gated Diode for Enhanced Speed and Retention Time. 184–185. 56 indexed citations
13.
Hanafi, H.I., et al.. (2005). Off-State Current and Performance Analysis for Double-Gate CMOS With Non-Self-Aligned Back Gate. IEEE Transactions on Electron Devices. 52(9). 2104–2107. 2 indexed citations
14.
Rieh, Jae-Sung, J. Cai, T.H. Ning, Andy Stricker, & G. Freeman. (2005). Reverse Active Mode Current Characteristics of SiGe HBTs. IEEE Transactions on Electron Devices. 52(6). 1219–1222. 13 indexed citations
15.
Narayanan, Vijay, J. Newbury, P. Jamison, et al.. (2005). Systematic study of work function engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks. 4 pp.–645. 18 indexed citations
16.
Shang, Huiling, J. Germán Rubino, B. Doris, et al.. (2005). Mobility and CMOS devices/circuits on sub-10nm [110] ultra thin body SOI. 78–79. 5 indexed citations
17.
Nowak, E., et al.. (2003). The effective drive current in CMOS inverters. 121–124. 198 indexed citations
18.
Rim, K., et al.. (2003). Low field mobility characteristics of sub-100 nm unstrained and strained Si MOSFETs. 43–46. 66 indexed citations
19.
Cai, J., A. Ajmera, Phil Oldiges, et al.. (2003). Fully-depleted-collector polysilicon-emitter SiGe-base vertical bipolar transistor on SOI. 172–173. 12 indexed citations
20.
Cai, J. & C. T. Sah. (2000). Interfacial electronic traps in surface controlled transistors. IEEE Transactions on Electron Devices. 47(3). 576–583. 33 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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