Hùng Ngô

508 total citations
21 papers, 357 citations indexed

About

Hùng Ngô is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Hùng Ngô has authored 21 papers receiving a total of 357 indexed citations (citations by other indexed papers that have themselves been cited), including 19 papers in Electrical and Electronic Engineering, 10 papers in Biomedical Engineering and 5 papers in Hardware and Architecture. Recurrent topics in Hùng Ngô's work include Low-power high-performance VLSI design (16 papers), Analog and Mixed-Signal Circuit Design (10 papers) and Advancements in Semiconductor Devices and Circuit Design (8 papers). Hùng Ngô is often cited by papers focused on Low-power high-performance VLSI design (16 papers), Analog and Mixed-Signal Circuit Design (10 papers) and Advancements in Semiconductor Devices and Circuit Design (8 papers). Hùng Ngô collaborates with scholars based in United States, Taiwan and Canada. Hùng Ngô's co-authors include Kevin Nowka, J.L. Burns, Tuyet Nguyen, Gary D. Carpenter, Bishop Brock, Eric MacDonald, Robert K. Montoye, S.H. Dhong, Wendy Belluomini and C. McDowell and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IBM Journal of Research and Development.

In The Last Decade

Hùng Ngô

21 papers receiving 336 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Hùng Ngô United States 9 327 151 85 39 26 21 357
C. Dietz United States 6 250 0.8× 139 0.9× 71 0.8× 42 1.1× 26 1.0× 7 290
Tuyet Nguyen United States 7 434 1.3× 200 1.3× 84 1.0× 54 1.4× 10 0.4× 10 469
C.L. Portmann United States 10 375 1.1× 100 0.7× 182 2.1× 38 1.0× 16 0.6× 16 398
D. Draper United States 5 274 0.8× 86 0.6× 82 1.0× 26 0.7× 56 2.2× 9 296
H. Partovi United States 8 308 0.9× 132 0.9× 91 1.1× 59 1.5× 60 2.3× 19 342
N. James United States 9 483 1.5× 289 1.9× 60 0.7× 66 1.7× 10 0.4× 10 522
Louis P. Alarcón Philippines 6 356 1.1× 110 0.7× 113 1.3× 39 1.0× 22 0.8× 39 380
G. Gerosa United States 8 428 1.3× 199 1.3× 107 1.3× 75 1.9× 25 1.0× 17 496
Y. Ye United States 6 546 1.7× 205 1.4× 65 0.8× 50 1.3× 19 0.7× 8 562
Y. Aimoto Japan 10 485 1.5× 173 1.1× 57 0.7× 57 1.5× 13 0.5× 22 516

Countries citing papers authored by Hùng Ngô

Since Specialization
Citations

This map shows the geographic impact of Hùng Ngô's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Hùng Ngô with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Hùng Ngô more than expected).

Fields of papers citing papers by Hùng Ngô

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Hùng Ngô. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Hùng Ngô. The network helps show where Hùng Ngô may publish in the future.

Co-authorship network of co-authors of Hùng Ngô

This figure shows the co-authorship network connecting the top 25 collaborators of Hùng Ngô. A scholar is included among the top collaborators of Hùng Ngô based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Hùng Ngô. Hùng Ngô is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kim, Keunwoo, Jente B. Kuang, Fadi H. Gebara, et al.. (2009). TCAD/Physics-Based Analysis of High-Density Dual-BOX FD/SOI SRAM Cell With Improved Stability. IEEE Transactions on Electron Devices. 56(12). 3033–3040. 5 indexed citations
2.
Barth, J., W. Reohr, John Golz, et al.. (2008). A one MB cache subsystem prototype with 2GHz embedded DRAMs in 45nm SOI CMOS. 206–207. 4 indexed citations
3.
Ngô, Hùng, et al.. (2008). Development of reprogrammable high frame-rate detector devices for laser communication pointing, acquisition and tracking. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 6877. 68770N–68770N. 1 indexed citations
4.
Kanj, Rouwaida, Rajiv Joshi, Li Zhou, et al.. (2008). SRAM methodology for yield and power efficiency. 87–87. 1 indexed citations
5.
Kuang, Jente B., Keunwoo Kim, Ching-Te Chuang, et al.. (2008). Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16(12). 1657–1665. 6 indexed citations
6.
Ngô, Hùng, et al.. (2006). A low-overhead virtual rail technique for SRAM leakage power reduction. 574–579. 4 indexed citations
7.
Ngô, Hùng, et al.. (2006). The Design and Implementation of a Low-Overhead Supply-Gated SRAM. 287–290. 2 indexed citations
8.
Ngô, Hùng, et al.. (2006). An Asymmetrical Double-Gate VCO with Wide Frequency Range. 1–2. 1 indexed citations
9.
Belluomini, Wendy, Damir A. Jamsek, Andrew Martin, et al.. (2006). Limited switch dynamic logic circuits for high-speed low-power circuit design. IBM Journal of Research and Development. 50(2.3). 277–286. 16 indexed citations
10.
Chuang, C.T., et al.. (2006). Dynamic Circuit Techniques Using Independently Controlled Double-Gate Devices. 74–76. 3 indexed citations
11.
Ngô, Hùng, et al.. (2006). Wide limited switch dynamic logic circuit implementations. 6 pp.–6 pp.. 9 indexed citations
12.
Ngô, Hùng, et al.. (2005). Controlled-Load Limited Switch Dynamic Logic Circuit. 83–87. 5 indexed citations
13.
Belluomini, Wendy, Damir A. Jamsek, Andrew Martin, et al.. (2005). An 8Ghz floating-point multiply. 374–376. 15 indexed citations
14.
Nowka, Kevin, Gary D. Carpenter, Hùng Ngô, et al.. (2005). A 0.9V to 1.95V dynamic voltage-scalable and frequency-scalable 32b powerPC processor. 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315). 2. 272–503. 12 indexed citations
15.
Abraham, Jacob A., Robert K. Montoye, Wendy Belluomini, et al.. (2004). A low latency and low power dynamic Carry Save Adder. II–477. 6 indexed citations
16.
Montoye, Robert K., et al.. (2003). A double precision floating point multiply. 1. 336–337. 14 indexed citations
17.
Nowka, Kevin, Gary D. Carpenter, Eric MacDonald, et al.. (2002). A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling. IEEE Journal of Solid-State Circuits. 37(11). 1441–1447. 157 indexed citations
18.
Posluszny, S., N. Aoki, D. Boerstler, et al.. (2002). Design methodology for a 1.0 GHz microprocessor. 17–23. 24 indexed citations
19.
Park, Jaehong, et al.. (2002). 470 ps 64-bit parallel binary adder [for CPU chip]. 192–193. 20 indexed citations
20.
Silberman, J. A., N. Aoki, D. Boerstler, et al.. (1998). A 1.0-GHz single-issue 64-bit powerPC integer processor. IEEE Journal of Solid-State Circuits. 33(11). 1600–1608. 44 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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