J.-P. Colinge

5.8k total citations · 1 hit paper
141 papers, 4.0k citations indexed

About

J.-P. Colinge is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, J.-P. Colinge has authored 141 papers receiving a total of 4.0k indexed citations (citations by other indexed papers that have themselves been cited), including 138 papers in Electrical and Electronic Engineering, 23 papers in Biomedical Engineering and 14 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in J.-P. Colinge's work include Advancements in Semiconductor Devices and Circuit Design (114 papers), Semiconductor materials and devices (106 papers) and Silicon Carbide Semiconductor Technologies (44 papers). J.-P. Colinge is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (114 papers), Semiconductor materials and devices (106 papers) and Silicon Carbide Semiconductor Technologies (44 papers). J.-P. Colinge collaborates with scholars based in Belgium, United States and France. J.-P. Colinge's co-authors include Jong‐Tae Park, Denis Flandre, Jean‐Pierre Raskin, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, Pedram Razavi, Weize Xiong, A. Viviani and Christopher Lee and has published in prestigious journals such as Applied Physics Letters, Journal of Applied Physics and IEEE Journal of Solid-State Circuits.

In The Last Decade

J.-P. Colinge

132 papers receiving 3.8k citations

Hit Papers

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What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Multiple-gate SOI MOSFETs: device design guidelines

2002 360 citations J.-P. Colinge et al. IEEE Transactions on Electron Devices profile →

Peers

Countries citing papers authored by J.-P. Colinge

Since Specialization

Citations

This map shows the geographic impact of J.-P. Colinge's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.-P. Colinge with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.-P. Colinge more than expected).

Fields of papers citing papers by J.-P. Colinge

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.-P. Colinge. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.-P. Colinge. The network helps show where J.-P. Colinge may publish in the future.

Co-authorship network of co-authors of J.-P. Colinge

This figure shows the co-authorship network connecting the top 25 collaborators of J.-P. Colinge. A scholar is included among the top collaborators of J.-P. Colinge based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J.-P. Colinge. J.-P. Colinge is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	SOI gated resistor: CMOS without junctions 2009 ·J.-P. Colinge, Christopher Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, Pedram Razavi, B. O'Neill, Alan Blake, Mark White, (unknown), Brendan McCarthy, R.A. Murphy	115
2	Multigate SOI MOSFETs: Accumulation-mode vs. enhancement-mode 2008 ·Aryan Afzalian, Dimitri Lederer, (unknown), Ran Yan, Wenjing Xiong, C. Rinn Cleavelin, J.-P. Colinge	4
3	SOI for hostile environment applications 2005 ·J.-P. Colinge	11
4	An efficient design tool for transmission line on SIMOX substrates 2002 ·Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) ·J.‐P. Raskin, Isabelle Huynen, Renaud Gillon, D. Vanhoenacker, J.-P. Colinge	4
5	The nature of high-temperature instability in fully depleted SOI IM n-MOSFETs 2002 ·A. N. Nazarov, (unknown), J.-P. Colinge	0
6	High-frequency four noise parameters of silicon-on-insulator-based technology MOSFET for the design of low-noise RF integrated circuits 1999 ·IEEE Transactions on Electron Devices ·G. Dambrine, Jean‐Pierre Raskin, F. Danneville, (unknown), J.-P. Colinge, A. Cappy	55
7	Recombination current modeling and carrier lifetime extraction in dual-gate fully-depleted SOI devices 1999 ·IEEE Transactions on Electron Devices ·T. Ernst, S. Cristoloveanu, A. Vandooren, Tamara Rudenko, J.-P. Colinge	17
8	Potential and modeling of 1-μm SOI CMOS operational transconductance amplifiers for applications up to 1 GHz 1998 ·IEEE Journal of Solid-State Circuits ·J.-P. Eggermont, Denis Flandre, J.‐P. Raskin, J.-P. Colinge	16
9	Comparison of Self-Heating Effects in SOI and GAA Devices 1995 ·European Solid-State Device Research Conference ·P. Francis, Denis Flandre, J.-P. Colinge, F. Van de Wiele	1
10	High-Temperature Gate Capacitances of Thin-Film SOI MOSFETs 1993 ·Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) ·B. Gentinne, Denis Flandre, J.-P. Colinge, F. Van de Wiele	1
11	Improvement of output impedance in SOI MOSFETs 1990 ·European Solid-State Device Research Conference ·M.-H. Gao, J.-P. Colinge, (unknown), Cor Claeys	1
12	Performance and physical mechanisms in SIMOX MOS transistors operated at very low temperature 1990 ·IEEE Transactions on Electron Devices ·T. Elewa, F. Balestra, S. Cristoloveanu, I.M. Hafez, J.-P. Colinge, A.J. Auberton‐Hervé, J. Davis	58
13	Analysis of drain breakdown voltage in SOI n -channel MOSFETs 1989 ·Electronics Letters ·M. Haond, J.-P. Colinge	12
14	Thin-film SOI devices: A perspective 1988 ·Microelectronic Engineering ·J.-P. Colinge	26
15	An SOI voltage-controlled bipolar-MOS device 1987 ·IEEE Transactions on Electron Devices ·J.-P. Colinge	96
16	High-speed, low-power, implanted-buried-oxide CMOS circuits 1986 ·IEEE Electron Device Letters ·J.-P. Colinge, Kazuhiko Hashimoto, T. I. Kamins, Shang-Yi Chiang, (unknown), (unknown), (unknown)	33
17	Fabrication of thin silicon-on-insulator flims using laser recrystallisation 1985 ·Electronics Letters ·J.-P. Colinge, Hao Hu, (unknown)	7
18	Field-effect in large grain polysilicon transistors 1982 ·J.-P. Colinge, (unknown), Hervé Morel	7
19	Stacked transistors CMOS (ST-MOS), an NMOS technology modified to CMOS 1982 ·IEEE Transactions on Electron Devices ·J.-P. Colinge, (unknown), (unknown)	24
20	Laser light absorption in multilayers 1981 ·Journal of Applied Physics ·J.-P. Colinge, F. Van de Wiele	16

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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