F. Allain

1.8k citations

36 papers · 559 indexed · h-index 13

Electrical and Electronic Engineering top 10%
- Advancements in Semiconductor Devices and Circuit Design 33
- Semiconductor materials and devices 32
- Integrated Circuits and Semiconductor Failure Analysis 7
- Ferroelectric and Negative Capacitance Devices 5
- Silicon Carbide Semiconductor Technologies 3
- Thin-Film Transistor Technologies 3
Hardware and Architecture
Biomedical Engineering
- Nanowire Synthesis and Applications 8
Atomic and Molecular Physics, and Optics
- Semiconductor materials and interfaces 3
Structural Biology

Co-authors: T. Poiroux O. Faynot M. Cassé O. Weber B. Prévitali C. Tabone M. Vinet D. Lafond
Cited by: Electrical and Electronic Engineering Hardware and Architecture Biomedical Engineering
Journals: IEEE Transactions on Electron Devices (4 papers)Solid-State Electronics (3 papers)IEEE Electron Device Letters (2 papers)
Partner nations: France Czechia Switzerland

In The Last Decade

F. Allain

35 papers receiving 540 citations

Peers

Countries citing papers authored by F. Allain

Since Specialization

Citations

This map shows the geographic impact of F. Allain's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by F. Allain with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites F. Allain more than expected).

Fields of papers citing papers by F. Allain

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by F. Allain. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by F. Allain. The network helps show where F. Allain may publish in the future.

Co-authorship network

The 25 scholars most cited alongside F. Allain, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with F. Allain Line = papers co-authored together F. Allain links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	New insights on SOI Tunnel FETs with low-temperature process flow for CoolCube™ integration Solid-State Electronics ·M Lynn Whalen,C. Le Royer,P. Batude,C. Fenouillet-Béranger,S. Martinie,R N Ingela Thylen,F. Allain,J.P. Colinge,S. Cristoloveanu,G. Ghibaudo,M. Vinet	2018	6
2	Leakage Current Paths in Isolated AlGaN/GaN Heterostructures IEEE Transactions on Semiconductor Manufacturing ·Vincent Clay,E. Morvan,J. Vial,F. Allain,P.J. Krop,Matthew Charles,M. Plissonnier	2016	6
3	Integration of Low Temperature SiGe:B Raised Sources and Drains in p-Type FDSOI Field Effect Transistors ECS Transactions ·Sidun Zhang,C. Fenouillet-Béranger,Jean‐Michel Hartmann,Philippe Rodriguez,V. Benevent,Marie-Pierre Samson,B. Prévitali,C. Tabone,M. Cassé,F. Allain,G. Romano,Laurent Brunet,P. Batude,T. Skotnicki,M. Vinet	2016	1
4	Fabrication and electrical characterizations of SGOI tunnel FETs with gate length down to 50 nm Solid-State Electronics ·C. Le Royer,Emil R. Salakhutdinov,Louis Hutin,S. Martinie,P. Nguyen,Sylvain Barraud,Abd El Ghany Mohammed,F. Allain,Nicolas Bernier,S. Cristoloveanu,M. Vinet	2015	11
5	Opportunities and challenges of nanowire-based CMOS technologies Sylvain Barraud,M. Cassé,Thiérry Favier,P. Nguyen,Jean‐Michel Hartmann,Marie-Pierre Samson,V. Maffini-Alvaro,C. Tabone,C. Vizioz,C. Arvet,Patricia Pimenta‐Barros,Abd El Ghany Mohammed,Nicolas Bernier,O. Rozeau,M.-A. Jaud,S. Martinie,英夫阿部,F. Allain,B. De Salvo,M. Vinet	2015	11
6	Strained Silicon Directly on Insulator N- and P-FET nanowire transistors Sylvain Barraud,Romain Laviéville,C. Tabone,F. Allain,M. Cassé,Marie-Pierre Samson,G C Tremblay,M. Vinet	2014	15
7	High mobility w-gate nanowire P-FET on cSGOI substrates obtained by Ge enrichment technique P. Nguyen,Sylvain Barraud,Masahiro Koyama,M. Cassé,Bangxiu Chi,C. Tabone,Abd El Ghany Mohammed,Jean‐Michel Hartmann,V. Maffini-Alvaro,D. Rouchon,Nicolas Bernier,D. Lafond,Marie-Pierre Samson,F. Allain,C. Vizioz,D. Delprat,Bich-Yen Nguyen,C. Mazuré,O. Faynot,M. Vinet	2014	3
8	Evaluation Of Ni(Si_1-xGe_x) and Pt(Si_1-xGe_x) Contact Resistance for FD-SOI PMOS Metallic Source and Drain ECS Transactions ·一典鈴木,F. Nemouchi,V. Carron,Y. Morand,Haley Flom,M. Vinet,Jean‐François Damlencourt,F. Allain,O. Cueto,D. Lafond	2013	3
9	Experimental Investigation of the Tunneling Injection Boosters for Enhanced $I_{ON}$ ETSOI Tunnel FET IEEE Transactions on Electron Devices ·Emil R. Salakhutdinov,C. Le Royer,M. Cassé,M I Sawaya,Jean‐Michel Hartmann,F. Allain,C. Tabone,Bangxiu Chi,S. Cristoloveanu	2013	19
10	Enhanced Performance of P-FET Omega-Gate SoI Nanowire With Recessed-SiGe Source-Drain Down to 13-nm Gate Length IEEE Electron Device Letters ·Sylvain Barraud,R. Coquand,Jean‐Michel Hartmann,V. Maffini-Alvaro,Marie-Pierre Samson,L. Tosti,F. Allain	2013	14
11	Demonstration of low temperature 3D sequential FDSOI integration down to 50 nm gate length Symposium on VLSI Technology ·P. Batude,M. Vinet,Chuan Xu,B. Prévitali,C. Tabone,C. Le Royer,L. Sanchez,L. Baud,Laurent Brunet,A. Toffoli,F. Allain,D. Lafond,F. Aussenac,Ο. Thomas,T. Poiroux,O. Faynot	2011	13
12	3D monolithic integration P. Batude,M. Vinet,A. Pouydebasque,C. Le Royer,B. Prévitali,C. Tabone,Jean‐Michel Hartmann,L. Sanchez,L. Baud,V. Carron,A. Toffoli,F. Allain,V. Mazzocchi,D. Lafond,S. Deleonibus,O. Faynot	2011	18
13	Drain current variability and MOSFET parameters correlations in planar FDSOI technology 朱月亮,O. Weber,F. Andrieu,F. Allain,L. Tosti,L. Brévard,O. Rozeau,M.-A. Jaud,P. Perreau,C. Fenouillet-Béranger,Jong-Suk 최종석Choi,B. Colombeau,Alexana E. Cranmer,G. Ghibaudo,Marie‐Pierre Belleville,O. Faynot,T. Poiroux	2011	21
14	First demonstration of ultrathin body c-SiGe channel FDSOI pMOSFETs combined with SiGe(:B) RSD: Drastic improvement of electrostatics (V<inf>th,p</inf> tuning, DIBL) and transport (μ<inf>0</inf>, I<inf>sat</inf>) properties down to 23nm gate length SPIRE - Sciences Po Institutional REpository ·C. Le Royer,Emil R. Salakhutdinov,M. Cassé,David Cooper,J. Mazurier,B. Prévitali,C. Tabone,P. Perreau,Jean‐Michel Hartmann,P. Scheiblin,F. Allain,F. Andrieu,O. Weber,P. Batude,O. Faynot,T. Poiroux	2011	11
15	Investigation of mechanisms shifting metal effective workfunction towards P+ for various Al incorporation scenarii Mariola Kokowska,Behrooz Mohammadi,G. Reimbold,F. Allain,A. Toffoli,G. Ghibaudo,F. Martín,H. Grampeix,F. Boulanger	2010	2
16	Experimental Evidence of Sidewall Enhanced Transport Properties of Mesa-Isolated (001) Germanium-On-Insulator pMOSFETs IEEE Transactions on Electron Devices ·A. Pouydebasque,Ziyi An,C. Le Royer,C. Tabone,B. Prévitali,F. Allain,E. Augendre,Jean‐Michel Hartmann,H. Grampeix,Maud Vinet	2009	7
17	Additivity between sSOI- and CESL-induced nMOSFETs Performance Boosts Bangxiu Chi,F. Allain,Ranganath T. Sobagaiah,O. Faynot,Morgan A. Thompson,M. Cassé,V. Delaye,Fabien Aussenac,L. Tosti,Pascale Maury,L. Vandroux,Nicolas Daval,Ian Cayrefourcq,S. Deleonibus	2007	2
18	Ultra-Thin Fully Depleted SOI Devices with Thin BOX, Ground Plane and Strained Liner Booster C. Gallon,(unknown),A. Vandooren,F. Bœuf,(unknown),Harriet Ngubane,(unknown),Vincent Fiori,В.А. Королёв,N. Loubet,Paola F. Spadaro,(unknown),F. Allain,(unknown),Ian Cayrefourcq,B. Ghyselen,C. Mazuré,D. Delille,董建斌,(unknown),M. Hopstaken,(unknown),P. Rivallin,L. Brévard,E. Monroy,S. Cristoloveanu,T. Skotnicki	2006	12
19	ΩFETs transistors with tin metal gate and HfO/sub 2/ down to 10nm C. Jahan,O. Faynot,M. Cassé,R. Ritzenthaler,L. Brévard,L. Tosti,X. Garros,C. Vizioz,F. Allain,Anne‐Marie Papon,H. Dansas,F. Martín,M. Vinet,B. Guillaumot,A. Toffoli,B. Giffard,S. Deleonibus	2005	18
20	A 20 nm physical gate length NMOSFET with a 1.2 nm gate oxide fabricated by mixed dry and wet hard mask etching Solid-State Electronics ·C. Caillat,S. Deleonibus,G. Guégan,M. Heitzmann,Ying YOU,S. Tedesco,B. Dal’zotto,F. Martín,P. Mur,A.M. Papon,Leshchenko Hanna,B. Prévitali,A. Toffoli,F. Allain,Sun Da-jun,Fabrice Jourdan,Jakub Momro,Christopher Reynard Adrianto	2002	3

About F. Allain

F. Allain is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Atomic and Molecular Physics, and Optics, Condensed Matter Physics and Infectious Diseases, having authored 36 papers that have together received 559 indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (33 papers), Semiconductor materials and devices (32 papers), Nanowire Synthesis and Applications (8 papers), Integrated Circuits and Semiconductor Failure Analysis (7 papers), Ferroelectric and Negative Capacitance Devices (5 papers), Semiconductor materials and interfaces (3 papers), Silicon Carbide Semiconductor Technologies (3 papers) and Thin-Film Transistor Technologies (3 papers). The work is most often cited by research in Electrical and Electronic Engineering (549 citations), Hardware and Architecture (14 citations), Biomedical Engineering (78 citations), Atomic and Molecular Physics, and Optics (29 citations) and Structural Biology (1 citation). F. Allain has collaborated with scholars based in France, Czechia and Switzerland. Frequent co-authors include T. Poiroux, O. Faynot, M. Cassé, O. Weber, B. Prévitali, C. Tabone, M. Vinet, D. Lafond, S. Deleonibus and Jean‐Michel Hartmann. Their work appears in journals such as IEEE Transactions on Electron Devices, Solid-State Electronics, IEEE Electron Device Letters, Microelectronic Engineering and IEEE Transactions on Semiconductor Manufacturing.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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