P. Packan

2.8k total citations
32 papers, 1.1k citations indexed

About

P. Packan is a scholar working on Electrical and Electronic Engineering, Computational Mechanics and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, P. Packan has authored 32 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 32 papers in Electrical and Electronic Engineering, 4 papers in Computational Mechanics and 3 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in P. Packan's work include Advancements in Semiconductor Devices and Circuit Design (22 papers), Semiconductor materials and devices (21 papers) and Integrated Circuits and Semiconductor Failure Analysis (11 papers). P. Packan is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (22 papers), Semiconductor materials and devices (21 papers) and Integrated Circuits and Semiconductor Failure Analysis (11 papers). P. Packan collaborates with scholars based in United States. P. Packan's co-authors include J.D. Plummer, M. Bohr, T. Ghani, K. Mistry, Scott E. Thompson, S. Tyagi, S. Mudanai, M. Stettler, R. Rios and D. Becher and has published in prestigious journals such as Science, Applied Physics Letters and Journal of Applied Physics.

In The Last Decade

P. Packan

30 papers receiving 1.0k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
P. Packan United States	18	1.0k	184	163	101	43	32	1.1k
P. Zeitzoff United States	19	1.4k 1.4×	223 1.2×	159 1.0×	132 1.3×	13 0.3×	80	1.5k
J. Lorenz Germany	13	513 0.5×	137 0.7×	87 0.5×	85 0.8×	90 2.1×	86	655
Toshiyuki Mine Japan	17	917 0.9×	394 2.1×	329 2.0×	237 2.3×	37 0.9×	103	1.1k
R. Viswanathan United States	12	868 0.8×	93 0.5×	181 1.1×	234 2.3×	22 0.5×	33	994
N. Konofaos Greece	18	739 0.7×	418 2.3×	278 1.7×	92 0.9×	23 0.5×	85	938
G. Raghavan India	13	468 0.5×	225 1.2×	144 0.9×	188 1.9×	51 1.2×	40	676
T. Tsukada Japan	16	834 0.8×	151 0.8×	282 1.7×	154 1.5×	33 0.8×	65	881
C. Wann United States	19	1.6k 1.6×	148 0.8×	257 1.6×	246 2.4×	10 0.2×	59	1.7k
J.R. Watling United Kingdom	16	813 0.8×	192 1.0×	250 1.5×	124 1.2×	9 0.2×	70	972
T. Poiroux France	25	2.0k 1.9×	109 0.6×	181 1.1×	458 4.5×	39 0.9×	125	2.1k

Countries citing papers authored by P. Packan

Since Specialization

Citations

This map shows the geographic impact of P. Packan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Packan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Packan more than expected).

Fields of papers citing papers by P. Packan

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Packan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Packan. The network helps show where P. Packan may publish in the future.

Co-authorship network of co-authors of P. Packan

This figure shows the co-authorship network connecting the top 25 collaborators of P. Packan. A scholar is included among the top collaborators of P. Packan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with P. Packan. P. Packan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Giles, M.D., D. Becher, A. Kornfeld, et al.. (2015). High sigma measurement of random threshold voltage variation in 14nm Logic FinFET technology. T150–T151. 38 indexed citations

Prasad, C., M. Agostinelli, J. Hicks, et al.. (2014). Bias temperature instability variation on SiON/Poly, HK/MG and trigate architectures. 6A.5.1–6A.5.7. 34 indexed citations

Pae, Sangwoo, Ashwin Ashok, T. Ghani, et al.. (2010). Reliability characterization of 32nm high-K and Metal-Gate logic transistor technology. 287–292. 46 indexed citations

Packan, P., S. Cea, H. Deshpande, et al.. (2008). High performance Hi-K + metal gate strain enhanced transistors on (110) silicon. 1–4. 44 indexed citations

Sw, Lee, et al.. (2006). Halo Doping: Physical Effects and Compact Modeling. TechConnect Briefs. 3(2006). 644–647. 2 indexed citations

Mudanai, S., et al.. (2006). Analytical Modeling of Output Conductance in Long-Channel Halo-Doped MOSFETs. IEEE Transactions on Electron Devices. 53(9). 2091–2097. 15 indexed citations

Rios, R., et al.. (2005). An efficient surface potential solution algorithm for compact MOSFET models. 755–758. 26 indexed citations

Kuhn, Kelin J., D. Becher, M. Hattendorf, et al.. (2004). A comparison of state-of-the-art NMOS and SiGe HBT devices for analog/mixed-signal/RF circuit applications. 224–225. 43 indexed citations

Rios, R., et al.. (2003). A three-transistor threshold voltage model for halo processes. 113–116. 34 indexed citations

10.

Ghani, T., P. Charvát, Chu Chen, et al.. (2003). 100 nm gate length high performance/low power CMOS transistor structure. 415–418. 17 indexed citations

11.

Thompson, Scott E., P. Packan, T. Ghani, et al.. (2002). Source/drain extension scaling for 0.1 μm and below channel length MOSFETs. 132–133. 28 indexed citations

12.

Bohr, M., M. Bost, T. Ghani, et al.. (2002). A high performance 0.25 μm logic technology optimized for 1.8 V operation. 847–850. 32 indexed citations

13.

Chau, R., Reza Arghavani, Morteza S. Alavi, et al.. (2002). Scalability of partially depleted SOI technology for sub-0.25 μm logic applications. 591–594. 16 indexed citations

14.

Packan, P., Samuel C. Thompson, E. Andideh, et al.. (2002). Modeling solid source boron diffusion for advanced transistor applications. 505–508. 5 indexed citations

15.

Rios, R., et al.. (2002). A general partition scheme for gate leakage current suitable for MOSFET compact models. 13.3.1–13.3.4. 22 indexed citations

16.

Thompson, Scott E., P. Packan, & M. Bohr. (2002). Linear versus saturated drive current: tradeoffs in super steep retrograde well engineering. 154–155. 20 indexed citations

17.

Packan, P., et al.. (1999). Effect of Extended Defects on the Enhanced Diffusion of Phosphorus Implanted Silicon. MRS Proceedings. 568. 3 indexed citations

18.

Giles, M.D., et al.. (1997). Modeling Silicon Implantation Damage and Transient Enhanced Diffusion Effects for Silicon Technology Development. MRS Proceedings. 469. 11 indexed citations

19.

Griffin, Peter B., R. F. Lever, P. Packan, & J.D. Plummer. (1994). Doping and damage dose dependence of implant induced transient enhanced diffusion below the amorphization threshold. Applied Physics Letters. 64(10). 1242–1244. 14 indexed citations

20.

Packan, P. & J.D. Plummer. (1990). Temperature and time dependence of B and P diffusion in Si during surface oxidation. Journal of Applied Physics. 68(8). 4327–4329. 35 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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