Peter Debacker

1.5k total citations
73 papers, 924 citations indexed

About

Peter Debacker is a scholar working on Electrical and Electronic Engineering, Computer Vision and Pattern Recognition and Hardware and Architecture. According to data from OpenAlex, Peter Debacker has authored 73 papers receiving a total of 924 indexed citations (citations by other indexed papers that have themselves been cited), including 67 papers in Electrical and Electronic Engineering, 8 papers in Computer Vision and Pattern Recognition and 8 papers in Hardware and Architecture. Recurrent topics in Peter Debacker's work include Advanced Memory and Neural Computing (26 papers), Ferroelectric and Negative Capacitance Devices (24 papers) and Semiconductor materials and devices (23 papers). Peter Debacker is often cited by papers focused on Advanced Memory and Neural Computing (26 papers), Ferroelectric and Negative Capacitance Devices (24 papers) and Semiconductor materials and devices (23 papers). Peter Debacker collaborates with scholars based in Belgium, United States and Germany. Peter Debacker's co-authors include Diederik Verkest, Praveen Raghavan, Stefan Cosemans, Julien Ryckaert, Ioannis A. Papistas, Arindam Mallik, A. Spessot, A. Mallik, Marian Verhelst and Francky Catthoor and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Electronics Letters.

In The Last Decade

Peter Debacker

71 papers receiving 896 citations

Peers

Countries citing papers authored by Peter Debacker

Since Specialization

Citations

This map shows the geographic impact of Peter Debacker's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Peter Debacker with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Peter Debacker more than expected).

Fields of papers citing papers by Peter Debacker

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Peter Debacker. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Peter Debacker. The network helps show where Peter Debacker may publish in the future.

Co-authorship network of co-authors of Peter Debacker

This figure shows the co-authorship network connecting the top 25 collaborators of Peter Debacker. A scholar is included among the top collaborators of Peter Debacker based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Peter Debacker. Peter Debacker is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays 2023 ·Zenodo (CERN European Organization for Nuclear Research) ·Subhali Subhechha, Stefan Cosemans, Attilio Belmonte, Nouredine Rassoul, (unknown), Peter Debacker, Diederik Verkest, Romain Delhougne, Gouri Sankar Kar	5
2	DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC 2022 ·2022 IEEE International Solid- State Circuits Conference (ISSCC) ·Kodai Ueyoshi, Ioannis A. Papistas, (unknown), (unknown), Vikram Jain, (unknown), Qilin Zheng, (unknown), Peter Vrancx, (unknown), Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst	49
3	Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part I: CNFET Transistor Optimization 2022 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·(unknown), Lin Chen, Jie Liang, Yuanqing Cheng, (unknown), Jaehyun Lee, (unknown), Vihar Georgiev, Kai Ni, Peter Debacker, Asen Asenov, Aida Todri‐Sanial	20
4	Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration 2022 ·ACM Transactions on Design Automation of Electronic Systems ·(unknown), (unknown), Ioannis A. Papistas, (unknown), Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins	3
5	Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part II: CNT Interconnect Optimization 2022 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·(unknown), Lin Chen, Jie Liang, Yuanqing Cheng, (unknown), Jaehyun Lee, (unknown), Vihar Georgiev, Kai Ni, Peter Debacker, Asen Asenov, Aida Todri‐Sanial	6
6	Multi-pillar SOT-MRAM for Accurate Analog in-Memory DNN Inference 2021 ·Symposium on VLSI Technology ·(unknown), Kévin Garello, Siddharth Rao, Faisal Mohd-Yasin, Sébastien Couet, (unknown), A. Mallik, Stefan Cosemans, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene, Gouri Sankar Kar	7
7	A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm² in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration 2021 ·Ioannis A. Papistas, Stefan Cosemans, (unknown), (unknown), (unknown), Arindam Mallik, Peter Debacker, Diederik Verkest	28
8	Noise tolerant ternary weight deep neural networks for analog in-memory inference 2021 ·(unknown), Peter Vrancx, (unknown), Arindam Mallik, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene	3
9	Opportunities and Limitations of Emerging Analog in-Memory Compute DNN Architectures 2020 ·Lirias (KU Leuven) ·(unknown), Stefan Cosemans, Linyan Mei, Ioannis A. Papistas, Debjyoti Bhattacharjee, Peter Debacker, Arindam Mallik, Diederik Verkest, Marian Verhelst	19
10	3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes 2020 ·Dépôt institutionnel de l'Université libre de Bruxelles (Université Libre de Bruxelles) ·(unknown), Pieter Weckx, Shairfe Muhammad Salahuddin, (unknown), (unknown), Geert Van der Plas, Michele Stucchi, Rogier Baert, Peter Debacker, (unknown), Julien Ryckaert, Dragomir Milojevic, Eric Beyne	25
11	Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference 2019 ·Lirias (KU Leuven) ·Linyan Mei, (unknown), Dimitrios Rodopoulos, (unknown), Peter Debacker, Rudy Lauwereins, Marian Verhelst	27
12	A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs 2019 ·(unknown), Manu Perumkunnil, Francky Catthoor, (unknown), Peter Debacker, Gouri Sankar Kar, A. Furnémont, (unknown), José Ignacio Gómez, Christian Tenllado	8
13	Track height reduction for standard-cell in below 5nm node: how low can you go? 2018 ·Praveen Raghavan, (unknown), Diederik Verkest, A. Mocuta, (unknown), A. Spessot, Julien Ryckaert, (unknown), Peter Debacker, (unknown), (unknown)	7
14	MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts 2017 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Peter Debacker, (unknown), Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang	0
15	Design and pitch scaling for affordable node transition and EUV insertion scenario 2017 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·Ryoung-Han Kim, Julien Ryckaert, Praveen Raghavan, Yasser Sherazi, Peter Debacker, (unknown), Werner Gillijns, (unknown), Youssef Drissi, Víctor Blanco, Joost Bekaert, Ming Mao, (unknown), (unknown)	9
16	Large marginal 2D self-aligned via patterning for sub-5nm technology 2017 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), (unknown), (unknown), Peter Debacker, Praveen Raghavan, Ryoung-Han Kim, Youngsoo Shin	1
17	On-chip interconnect trends, challenges and solutions: How to keep RC and reliability under control 2016 ·Zs. Tôkei, Ivan Ciofi, Ph. Roussel, Peter Debacker, Prasanth Raghavan, Marleen H. van der Veen, N. Jourdan, Christopher Wilson, (unknown), Christoph Adelmann, Lianggong Wen, Kristof Croes, (unknown), Mikhail Krishtab, Silvia Armini, J. Bömmels	17
18	Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires 2016 ·M. Garcia Bardon, Yasser Sherazi, P. Schuddinck, Doyoung Jang, Dmitry Yakimets, Peter Debacker, Rogier Baert, Hans Mertens, Mustafa Badaroglu, A. Mocuta, Naoto Horiguchi, D. Mocuta, Prasanth Raghavan, Julien Ryckaert, A. Spessot, Diederik Verkest, An Steegen	53
19	An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS 2015 ·(unknown), Jan-Willem Weijers, Veerle Derudder, (unknown), (unknown), (unknown), Peter Debacker, (unknown), Yanxiang Huang, Liesbet Van der Perre, Wim Van Thillo	19
20	A novel positioning technique for 2.4GHz ISM band 2009 ·Ghent University Academic Bibliography (Ghent University) ·(unknown), Johan Wouters, (unknown), Peter Debacker, (unknown), (unknown), (unknown), Johan Bauwelinck, Xin Yin, Guy Torfs, Jan Vandewege	3

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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