Supreet Jeloka

1.1k total citations · 1 hit paper
23 papers, 866 citations indexed

About

Supreet Jeloka is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Supreet Jeloka has authored 23 papers receiving a total of 866 indexed citations (citations by other indexed papers that have themselves been cited), including 19 papers in Electrical and Electronic Engineering, 11 papers in Hardware and Architecture and 5 papers in Computer Networks and Communications. Recurrent topics in Supreet Jeloka's work include Advanced Memory and Neural Computing (6 papers), Low-power high-performance VLSI design (5 papers) and Parallel Computing and Optimization Techniques (5 papers). Supreet Jeloka is often cited by papers focused on Advanced Memory and Neural Computing (6 papers), Low-power high-performance VLSI design (5 papers) and Parallel Computing and Optimization Techniques (5 papers). Supreet Jeloka collaborates with scholars based in United States, United Kingdom and South Korea. Supreet Jeloka's co-authors include David Blaauw, Dennis Sylvester, Reetuparna Das, Shaizeen Aga, Arun Subramaniyan, Satish Narayanasamy, Kaiyuan Yang, Qing Dong, Satoru Miyoshi and Mehdi Saligane and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computers and IEEE Electron Device Letters.

In The Last Decade

Supreet Jeloka

23 papers receiving 851 citations

Hit Papers

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What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Compute Caches

2017 232 citations Supreet Jeloka, David Blaauw et al. profile →

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author						Papers	Cites
Supreet Jeloka	724	373	197	92	76	23	866
Xiaochen Guo	396 0.5×	259 0.7×	221 1.1×	58 0.6×	43 0.6×	37	603
Behnam Khaleghi	577 0.8×	218 0.6×	125 0.6×	185 2.0×	70 0.9×	51	744
Andrea Calimera	762 1.1×	224 0.6×	88 0.4×	96 1.0×	115 1.5×	116	957
Jongmin Lee	340 0.5×	246 0.7×	365 1.9×	40 0.4×	57 0.8×	78	704
Shuangchen Li	573 0.8×	156 0.4×	111 0.6×	119 1.3×	41 0.5×	25	682
Ioannis Savidis	815 1.1×	336 0.9×	149 0.8×	97 1.1×	20 0.3×	92	930
Mahmut E. Sinangil	1.3k 1.8×	388 1.0×	168 0.9×	141 1.5×	182 2.4×	34	1.5k
Ulya R. Karpuzcu	795 1.1×	455 1.2×	267 1.4×	162 1.8×	35 0.5×	60	1.0k
Ik‐Joon Chang	1.2k 1.6×	362 1.0×	123 0.6×	62 0.7×	93 1.2×	70	1.3k
Chenchen Deng	374 0.5×	160 0.4×	158 0.8×	182 2.0×	58 0.8×	48	642

Countries citing papers authored by Supreet Jeloka

Since Specialization

Citations

This map shows the geographic impact of Supreet Jeloka's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Supreet Jeloka with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Supreet Jeloka more than expected).

Fields of papers citing papers by Supreet Jeloka

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Supreet Jeloka. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Supreet Jeloka. The network helps show where Supreet Jeloka may publish in the future.

Co-authorship network of co-authors of Supreet Jeloka

This figure shows the co-authorship network connecting the top 25 collaborators of Supreet Jeloka. A scholar is included among the top collaborators of Supreet Jeloka based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Supreet Jeloka. Supreet Jeloka is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Wang, Ziyu, Xiaojian Zhu, Supreet Jeloka, Brian Cline, & Wei Lü. (2022). Physical Unclonable Function Systems Based on Pattern Transfer of Fingerprint-Like Patterns. IEEE Electron Device Letters. 43(4). 655–658. 5 indexed citations

Das, Shidhartha, et al.. (2022). Co-design of Thermal Management with System Architecture and Power Management for 3D ICs. 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC). 211–220. 4 indexed citations

Prabhat, Pranay, et al.. (2020). 27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power. 422–424. 22 indexed citations

Jeloka, Supreet, et al.. (2019). A 65nm switched source line sub-threshold ROM using data encoding, with 0.3V V_min and 47fJ/b access energy. 1–6. 2 indexed citations

Jeloka, Supreet, et al.. (2018). Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications. 85–86. 1 indexed citations

Prabhat, Pranay, et al.. (2018). A bulk 65nm Cortex-M0+ SoC with All-Digital Forward Body Bias for 4.3X Subthreshold Speedup. 183–186. 4 indexed citations

Dong, Qing, Supreet Jeloka, Mehdi Saligane, et al.. (2017). A 0.3V VDDmin 4+2T SRAM for searching and in-memory computing using 55nm DDC technology. C160–C161. 54 indexed citations

Dong, Qing, Supreet Jeloka, Mehdi Saligane, et al.. (2017). A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V $V_{\mathrm {DDmin}}$. IEEE Journal of Solid-State Circuits. 53(4). 1006–1015. 75 indexed citations

Jeloka, Supreet, Ziyun Li, Qing Dong, et al.. (2017). An ultra-wide program, 122pJ/bit flash memory using charge recycling. C196–C197. 3 indexed citations

10.

Zhang, Yiqun, Li Xu, Kaiyuan Yang, et al.. (2017). Recryptor: A reconfigurable in-memory cryptographic Cortex-M0 processor for IoT. C264–C265. 23 indexed citations

11.

Wu, Xiao, Yao Shi, Supreet Jeloka, et al.. (2017). A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications. IEEE Journal of Solid-State Circuits. 52(4). 972–984. 45 indexed citations

12.

Jeloka, Supreet, Kaiyuan Yang, Michael Orshansky, Dennis Sylvester, & David Blaauw. (2017). A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell. C270–C271. 53 indexed citations

13.

Pinckney, Nathaniel, L. Shifren, Brian Cline, et al.. (2016). Near-threshold computing in FinFET technologies. 1–6. 8 indexed citations

14.

Jeloka, Supreet, Akhil Arunkumar, David Blaauw, et al.. (2016). Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems. IEEE Transactions on Computers. 65(12). 3766–3779. 9 indexed citations

15.

Jeloka, Supreet, et al.. (2016). A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory. IEEE Journal of Solid-State Circuits. 51(4). 1009–1021. 256 indexed citations

16.

Wu, Xiao, Yao Shi, Supreet Jeloka, et al.. (2016). A 66pW discontinuous switch-capacitor energy harvester for self-sustaining sensor applications. PubMed Central. 1–2. 4 indexed citations

17.

Jeloka, Supreet, et al.. (2015). A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. C272–C273. 24 indexed citations

18.

Jeloka, Supreet, et al.. (2014). VIX: Virtual Input Crossbar for efficient switch allocation. 3 indexed citations

19.

Jeloka, Supreet, et al.. (2014). VIX. 1–6. 18 indexed citations

20.

Jeloka, Supreet, Reetuparna Das, Ronald Dreslinski, Trevor Mudge, & David Blaauw. (2014). Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration. 471–483. 8 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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