M. Bohr

7.4k total citations
51 papers, 4.0k citations indexed

About

M. Bohr is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Electronic, Optical and Magnetic Materials. According to data from OpenAlex, M. Bohr has authored 51 papers receiving a total of 4.0k indexed citations (citations by other indexed papers that have themselves been cited), including 50 papers in Electrical and Electronic Engineering, 5 papers in Biomedical Engineering and 4 papers in Electronic, Optical and Magnetic Materials. Recurrent topics in M. Bohr's work include Semiconductor materials and devices (44 papers), Advancements in Semiconductor Devices and Circuit Design (38 papers) and Low-power high-performance VLSI design (20 papers). M. Bohr is often cited by papers focused on Semiconductor materials and devices (44 papers), Advancements in Semiconductor Devices and Circuit Design (38 papers) and Low-power high-performance VLSI design (20 papers). M. Bohr collaborates with scholars based in United States and United Kingdom. M. Bohr's co-authors include T. Ghani, R. Chau, Ian A. Young, Scott E. Thompson, Fatih Hamzaoglu, Yuxiao Wang, K. Mistry, Kaizad Mistry, B. Zheng and Daniel Murray and has published in prestigious journals such as Communications of the ACM, IEEE Journal of Solid-State Circuits and Applied Surface Science.

In The Last Decade

M. Bohr

48 papers receiving 3.7k citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
M. Bohr 3.6k 569 513 478 344 51 4.0k
E. Bassous 2.6k 0.7× 572 1.0× 440 0.9× 436 0.9× 339 1.0× 28 3.2k
E. Nowak 5.5k 1.5× 658 1.2× 452 0.9× 922 1.9× 465 1.4× 176 5.8k
Kazuya Masu 2.0k 0.5× 567 1.0× 164 0.3× 282 0.6× 504 1.5× 322 2.4k
V.L. Rideout 3.0k 0.8× 388 0.7× 431 0.8× 430 0.9× 821 2.4× 25 3.5k
Asen Asenov 6.0k 1.7× 890 1.6× 408 0.8× 750 1.6× 929 2.7× 418 6.6k
B. Kaczer 10.0k 2.8× 348 0.6× 423 0.8× 1.2k 2.6× 544 1.6× 541 10.3k
Chenming Hu 4.8k 1.3× 797 1.4× 168 0.3× 624 1.3× 441 1.3× 103 5.1k
V. Natarajan 1.7k 0.5× 492 0.9× 813 1.6× 186 0.4× 126 0.4× 112 2.2k
D. Schmitt‐Landsiedel 4.0k 1.1× 1.4k 2.5× 520 1.0× 272 0.6× 811 2.4× 283 4.8k
Tetsuo Endoh 3.0k 0.8× 329 0.6× 360 0.7× 735 1.5× 1.5k 4.5× 325 3.9k

Countries citing papers authored by M. Bohr

Since Specialization
Citations

This map shows the geographic impact of M. Bohr's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Bohr with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Bohr more than expected).

Fields of papers citing papers by M. Bohr

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M. Bohr. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Bohr. The network helps show where M. Bohr may publish in the future.

Co-authorship network of co-authors of M. Bohr

This figure shows the co-authorship network connecting the top 25 collaborators of M. Bohr. A scholar is included among the top collaborators of M. Bohr based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Bohr. M. Bohr is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Bohr, M.. (2018). Logic Technology Scaling to Continue Moore's Law. 1–3. 15 indexed citations
2.
Karl, Eric, Yuxiao Wang, Yong-Gee Ng, et al.. (2012). A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry. IEEE Journal of Solid-State Circuits. 48(1). 150–158. 54 indexed citations
3.
Bohr, M.. (2011). Moore's Law in the innovation era. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 7974. 797402–797402. 6 indexed citations
4.
Bohr, M.. (2009). The new era of scaling in an SoC world. 23–28. 84 indexed citations
5.
Hamzaoglu, Fatih, Guomin Zhang, Yuxiao Wang, et al.. (2008). A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-¿ Metal-Gate CMOS Technology. 376–621. 31 indexed citations
6.
Wang, Yuxiao, Uddalak Bhattacharya, Zhanping Chen, et al.. (2008). A 1.1 GHz 12 $\mu$A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications. IEEE Journal of Solid-State Circuits. 43(1). 172–179. 49 indexed citations
7.
Wang, Yuxiao, Jiefeng Lin, Yat Hon Ng, et al.. (2007). A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications. 324–606. 25 indexed citations
8.
Bohr, M., R. Chau, T. Ghani, & Kaizad Mistry. (2007). The High-k Solution. IEEE Spectrum. 44(10). 29–35. 281 indexed citations
9.
10.
11.
Zhang, Kedong, Uma Bhattacharya, Fatih Hamzaoglu, et al.. (2005). A 3-GHz 70mb SRAM in 65nm CMOS technology with integrated column-based dynamic power supply. 474–476. 234 indexed citations
12.
Thompson, Scott E., R. Chau, T. Ghani, et al.. (2005). In Search of “Forever,” Continued Transistor Scaling One New Material at a Time. IEEE Transactions on Semiconductor Manufacturing. 18(1). 26–36. 117 indexed citations
13.
Ghani, T., M Armstrong, C. Auth, et al.. (2004). A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors. 11.6.1–11.6.3. 378 indexed citations
14.
Zhang, Kedong, Uma Bhattacharya, Fatih Hamzaoglu, et al.. (2004). SRAM design on 65nm CMOS technology with integrated leakage reduction scheme. 294–295. 63 indexed citations
15.
Mistry, K., M Armstrong, C. Auth, et al.. (2004). Delaying forever: Uniaxial strained silicon transistors in a 90nm CMOS technology. 50–51. 114 indexed citations
16.
Bohr, M.. (2002). Nanotechnology goals and challenges for electronic applications. IEEE Transactions on Nanotechnology. 1(1). 56–62. 132 indexed citations
17.
Bohr, M., M. Bost, T. Ghani, et al.. (2002). A high performance 0.25 μm logic technology optimized for 1.8 V operation. 847–850. 32 indexed citations
18.
Bohr, M.. (2000). Integrated Circuit Challenges, from Transistors to Packages. 1 indexed citations
19.
Bohr, M. & Y.A. El-Mansy. (1998). Technology for advanced high-performance microprocessors. IEEE Transactions on Electron Devices. 45(3). 620–625. 92 indexed citations
20.
Bohr, M., et al.. (1981). HMOS-CMOS-a low-power high-performance technology. IEEE Journal of Solid-State Circuits. 16(5). 454–459. 19 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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