H. Deshpande

796 total citations
10 papers, 136 citations indexed

About

H. Deshpande is a scholar working on Electrical and Electronic Engineering, Aerospace Engineering and Biomedical Engineering. According to data from OpenAlex, H. Deshpande has authored 10 papers receiving a total of 136 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Electrical and Electronic Engineering, 1 paper in Aerospace Engineering and 1 paper in Biomedical Engineering. Recurrent topics in H. Deshpande's work include Advancements in Semiconductor Devices and Circuit Design (9 papers), Semiconductor materials and devices (9 papers) and Silicon Carbide Semiconductor Technologies (5 papers). H. Deshpande is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (9 papers), Semiconductor materials and devices (9 papers) and Silicon Carbide Semiconductor Technologies (5 papers). H. Deshpande collaborates with scholars based in United States. H. Deshpande's co-authors include J.C.S. Woo, Baohong Cheng, O. Golonzka, C. Weber, Meera Stephen, S. Cea, L. Shifren, M.D. Giles, K. Zawadzki and P. Packan and has published in prestigious journals such as IEEE Transactions on Electron Devices and IEEE Electron Device Letters.

In The Last Decade

H. Deshpande

10 papers receiving 126 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
H. Deshpande United States	5	136	24	7	3	2	10	136
J. Jopling United States	4	113 0.8×	27 1.1×	6 0.9×	2 0.7×	3 1.5×	6	114
B.A. Rainey United States	5	131 1.0×	13 0.5×	6 0.9×	5 1.7×	2 1.0×	7	134
K. Okano Japan	7	155 1.1×	19 0.8×	7 1.0×	2 0.7×	5 2.5×	15	158
T.L. Lee Taiwan	4	104 0.8×	19 0.8×	7 1.0×	2 0.7×	6 3.0×	6	107
Ahmet Tura United States	4	143 1.1×	40 1.7×	9 1.3×		2 1.0×	7	144
M. Marin France	8	231 1.7×	32 1.3×	10 1.4×	3 1.0×	6 3.0×	23	234
B. Haran United States	4	66 0.5×	17 0.7×	5 0.7×	3 1.0×	1 0.5×	8	66
Martine Villegas France	6	84 0.6×	32 1.3×	7 1.0×			17	86
Peter Gray United States	6	98 0.7×	12 0.5×	10 1.4×	1 0.3×	2 1.0×	14	98

Countries citing papers authored by H. Deshpande

Since Specialization

Citations

This map shows the geographic impact of H. Deshpande's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Deshpande with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Deshpande more than expected).

Fields of papers citing papers by H. Deshpande

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Deshpande. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Deshpande. The network helps show where H. Deshpande may publish in the future.

Co-authorship network of co-authors of H. Deshpande

This figure shows the co-authorship network connecting the top 25 collaborators of H. Deshpande. A scholar is included among the top collaborators of H. Deshpande based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H. Deshpande. H. Deshpande is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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10 of 10 papers shown

1.

Deshpande, H. & Kailash J. Karande. (2017). Integrated CMOS 3D Microstrip Patch Antenna Prototype for Wireless Energy Harvesting. 1 indexed citations

2.

Weber, C., et al.. (2011). Modeling of NMOS performance gains from edge dislocation stress. 34.4.1–34.4.4. 15 indexed citations

3.

Rahman, Anisur, M. Agostinelli, Peng Bai, et al.. (2011). Reliability studies of a 32nm System-on-Chip (SoC) platform technology with 2<inf>nd</inf> generation high-k/metal gate transistors. 12. 5D.3.1–5D.3.6. 11 indexed citations

4.

Packan, P., S. Cea, H. Deshpande, et al.. (2008). High performance Hi-K + metal gate strain enhanced transistors on (110) silicon. 1–4. 44 indexed citations

5.

Deshpande, H., Baohong Cheng, & J.C.S. Woo. (2002). Channel engineering for analog device design in deep submicron CMOS technology for system on chip applications. IEEE Transactions on Electron Devices. 49(9). 1558–1565. 28 indexed citations

6.

Deshpande, H., et al.. (2002). Enhanced subthreshold leakage current due to impact ionization in deep sub-100nm N-channel double-gate MOSFETs. 147–148. 3 indexed citations

7.

Deshpande, H., Binbin Cheng, & J.C.S. Woo. (2002). Deep sub-micron CMOS device design for low power analog applications. 87–88. 3 indexed citations

8.

Deshpande, H., Baolei Cheng, & J. C. Woo. (2002). Sub-micron fully depleted lateral asymmetric channel SOI MOSFETs for analog and mixed mode applications. 54–55. 3 indexed citations

9.

Deshpande, H., Baohong Cheng, & J.C.S. Woo. (2001). Analog device design for low power mixed mode applications in deep submicron CMOS technology. IEEE Electron Device Letters. 22(12). 588–590. 25 indexed citations

10.

Deshpande, H., Binbin Cheng, & J. C. Woo. (2000). Improvement of Flicker Noise in Lateral Asymmetric Channel N-MOSFETs for Sub-micron Analog Applications. 496–499. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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