Leland Chang

4.1k total citations · 1 hit paper
47 papers, 2.9k citations indexed

About

Leland Chang is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, Leland Chang has authored 47 papers receiving a total of 2.9k indexed citations (citations by other indexed papers that have themselves been cited), including 45 papers in Electrical and Electronic Engineering, 9 papers in Hardware and Architecture and 8 papers in Artificial Intelligence. Recurrent topics in Leland Chang's work include Advancements in Semiconductor Devices and Circuit Design (22 papers), Semiconductor materials and devices (22 papers) and Advanced Memory and Neural Computing (15 papers). Leland Chang is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (22 papers), Semiconductor materials and devices (22 papers) and Advanced Memory and Neural Computing (15 papers). Leland Chang collaborates with scholars based in United States, Japan and Taiwan. Leland Chang's co-authors include Jeffrey Bokor, Robert K. Montoye, Tsu-Jae King, Chenming Hu, R.H. Dennard, Wilfried Haensch, Jae-sun Seo, Damir A. Jamsek, Yang‐Kyu Choi and Yutaka Nakamura and has published in prestigious journals such as Proceedings of the IEEE, IEEE Journal of Solid-State Circuits and IEEE Transactions on Electron Devices.

In The Last Decade

Leland Chang

46 papers receiving 2.7k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

FinFET scaling to 10 nm gate length

2003 462 citations Bin Yu, Leland Chang et al. profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Leland Chang United States	23	2.7k	356	255	182	172	47	2.9k
Ya‐Chin King Taiwan	26	3.1k 1.2×	257 0.7×	265 1.0×	327 1.8×	516 3.0×	230	3.3k
Lan Wei Canada	24	1.7k 0.6×	243 0.7×	294 1.2×	304 1.7×	394 2.3×	95	2.1k
Tony F. Wu United States	21	1.2k 0.4×	155 0.4×	211 0.8×	154 0.8×	262 1.5×	38	1.5k
Sung-Mo Kang United States	26	2.8k 1.0×	382 1.1×	427 1.7×	663 3.6×	95 0.6×	129	3.0k
Paolo Pavan Italy	29	3.5k 1.3×	267 0.8×	160 0.6×	254 1.4×	682 4.0×	217	3.9k
Chih-Cheng Hsieh Taiwan	29	3.2k 1.2×	888 2.5×	270 1.1×	462 2.5×	94 0.5×	138	3.4k
Tony Tae-Hyoung Kim Singapore	22	1.5k 0.5×	265 0.7×	384 1.5×	113 0.6×	69 0.4×	154	1.7k
Jaydeep P. Kulkarni United States	23	2.5k 0.9×	808 2.3×	427 1.7×	118 0.6×	718 4.2×	120	3.1k
Siddharth Joshi United States	20	1.7k 0.6×	191 0.5×	159 0.6×	493 2.7×	158 0.9×	57	1.9k
Takashi Morie Japan	16	1.2k 0.5×	400 1.1×	72 0.3×	235 1.3×	47 0.3×	177	1.5k

Countries citing papers authored by Leland Chang

Since Specialization

Citations

This map shows the geographic impact of Leland Chang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Leland Chang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Leland Chang more than expected).

Fields of papers citing papers by Leland Chang

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Leland Chang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Leland Chang. The network helps show where Leland Chang may publish in the future.

Co-authorship network of co-authors of Leland Chang

This figure shows the co-authorship network connecting the top 25 collaborators of Leland Chang. A scholar is included among the top collaborators of Leland Chang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Leland Chang. Leland Chang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

1.

Agrawal, Ankur, Monodeep Kar, Kyu Hyun Kim, et al.. (2023). A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS. 1–2. 2 indexed citations

2.

Jain, Shubham, Swagath Venkataramani, Vijayalakshmi Srinivasan, et al.. (2019). BiScaled-DNN. 1–6. 20 indexed citations

3.

Jain, Shubham, Swagath Venkataramani, Vijayalakshmi Srinivasan, et al.. (2018). Compensated-DNN. 1–6. 33 indexed citations

4.

Venkataramani, Swagath, Jungwook Choi, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan, & Leland Chang. (2017). POSTER: Design Space Exploration for Performance Optimization of Deep Neural Networks on Shared Memory Accelerators. 146–147. 9 indexed citations

5.

Wang, Naigang, D. Goren, E. J. O’Sullivan, et al.. (2014). Ultra-high-Q air-core slab inductors for on-chip power conversion. 12.3.1–12.3.4. 4 indexed citations

6.

Chang, Leland & Wilfried Haensch. (2012). Near-threshold operation for power-efficient computing?. 1159–1163. 16 indexed citations

7.

Kim, Chris H. & Leland Chang. (2011). Guest editors' introduction: Nanoscale Memories Pose Unique Challenges. IEEE Design & Test of Computers. 28(1). 6–8. 1 indexed citations

8.

Seo, Jae-sun, Bernard Brezzo, Yong Liu, et al.. (2011). A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons. 1–4. 264 indexed citations

9.

Montoye, Robert K., et al.. (2011). A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation. 256–258. 22 indexed citations

10.

Chang, Leland, et al.. (2010). A fully-integrated switched-capacitor 2∶1 voltage converter with regulation capability and 90% efficiency at 2.3A/mm<sup>2</sup>. 55–56. 116 indexed citations

11.

Qazi, Masood, Kevin Stawiasz, Leland Chang, & Anantha P. Chandrakasan. (2010). A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS. IEEE Journal of Solid-State Circuits. 46(1). 85–96. 50 indexed citations

12.

Qazi, Masood, Kevin Stawiasz, Leland Chang, & Anantha P. Chandrakasan. (2010). A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS. 350–351. 26 indexed citations

13.

Pearson, D.J., Isaac Lauer, Franco Stellari, et al.. (2009). Operational Amplifier Based Test Structure for Quantifying Transistor Threshold Voltage Variation. IEEE Transactions on Semiconductor Manufacturing. 22(1). 51–58. 14 indexed citations

14.

Chang, Leland, Robert K. Montoye, Yutaka Nakamura, et al.. (2008). An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches. IEEE Journal of Solid-State Circuits. 43(4). 956–963. 307 indexed citations

15.

Pearson, D.J., Isaac Lauer, Franco Stellari, et al.. (2008). Operational amplifier based test structure for transistor threshold voltage variation. 3–7. 9 indexed citations

16.

Chang, Leland, Yutaka Nakamura, Robert K. Montoye, et al.. (2007). A 5.3GHz 8T-SRAM with Operation Down to 0.41V in 65nm CMOS. 252–253. 104 indexed citations

17.

Kosonocky, Stephen, A.J. Bhavnagarwala, & Leland Chang. (2006). Scalability options for future SRAM memories. 689–692. 2 indexed citations

18.

Chang, Leland, Yang‐Kyu Choi, Daewon Ha, et al.. (2003). Extremely scaled silicon nano-CMOS devices. Proceedings of the IEEE. 9(11). 1860–1873. 202 indexed citations

19.

Yu, Bin, Leland Chang, Safayet Ahmed, et al.. (2003). FinFET scaling to 10 nm gate length. 251–254. 462 indexed citations breakdown →

20.

Huang, Xuejue, Wen‐Chin Lee, C. Kuo, et al.. (2003). Sub 50-nm FinFET: PMOS. 67–70. 270 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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