R. Chau

7.8k citations

57 papers · 4.7k indexed · 1 hit paper · h-index 33

Electrical and Electronic Engineering top 0.5%
- Semiconductor materials and devices 52
- Advancements in Semiconductor Devices and Circuit Design 51
- Integrated Circuits and Semiconductor Failure Analysis 9
- Ferroelectric and Negative Capacitance Devices 9
- Advancements in Photolithography Techniques 2
Biomedical Engineering top 2%
- Nanowire Synthesis and Applications 20
Atomic and Molecular Physics, and Optics top 2%
- Semiconductor Quantum Structures and Devices 5
Materials Chemistry top 5%
Condensed Matter Physics top 10%
Electronic, Optical and Magnetic Materials
- Ga2O3 and related materials 3

Co-authors: J. Kavalieros Suman Datta M. Doczy M. Metz B.S. Doyle Barry M. Doyle M. Bohr G. Dewey
Cited by: Electrical and Electronic Engineering Biomedical Engineering Atomic and Molecular Physics, and Optics
Journals: IEEE Electron Device Letters (6 papers)IEEE Transactions on Electron Devices (3 papers)Microelectronic Engineering (1 paper)
Partner nations: United States United Kingdom Sweden

In The Last Decade

R. Chau

56 papers receiving 4.5k citations

Hit Papers

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What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

2005 Benchmarking nanotechnology for high-performance and low power logic transistor applications

Peers

Countries citing papers authored by R. Chau

Since Specialization

Citations

This map shows the geographic impact of R. Chau's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Chau with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Chau more than expected).

Fields of papers citing papers by R. Chau

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by R. Chau. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Chau. The network helps show where R. Chau may publish in the future.

Co-authorship network

The 25 scholars most cited alongside R. Chau, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with R. Chau Line = papers co-authored together R. Chau links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Experimental observation and physics of “negative” capacitance and steeper than 40mV/decade subthreshold swing in Al<inf>0.83</inf>In<inf>0.17</inf>N/AlN/GaN MOS-HEMT on SiC substrate Han Wui Then,Sandeepan DasGupta,M. Radosavljević,Ф Х Камилов,B. Chu-Kung,G. Dewey,Shao-qing Guan,Xiaoqin Gao,J. Kavalieros,Niloy Mukherjee,M. Metz,Matthew J. Oliver,R. Pillarisetty,Valluri Rao,Seung-Hun Sung,Guanhua Yang,R. Chau	2013	21
2	Non-planar, multi-gate InGaAs quantum well field effect transistors with high-K gate dielectric and ultra-scaled gate-to-drain/gate-to-source separation for low power logic applications M. Radosavljević,G. Dewey,J. M. Fastenau,J. Kavalieros,R. Kotlyar,B. Chu-Kung,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,Niloy Mukherjee,L. Pan,R. Pillarisetty,W. Rachmady,Uday Shah,R. Chau	2010	78
3	Advanced high-K gate dielectric for high-performance short-channel In<inf>0.7</inf>Ga<inf>0.3</inf>As quantum well field effect transistors on silicon substrate for low power logic applications M. Radosavljević,B. Chu-Kung,S. Corcoran,G. Dewey,Mantu K. Hudait,J. M. Fastenau,J. Kavalieros,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,Niloy Mukherjee,W. Rachmady,Uday Shah,R. Chau	2009	111
4	Logic performance evaluation and transport physics of Schottky-gate III–V compound semiconductor quantum well field effect transistors for power supply voltages (V<inf>CC</inf>) ranging from 0.5v to 1.0v G. Dewey,R. Kotlyar,R. Pillarisetty,M. Radosavljević,Titash Rakshit,Han Wui Then,R. Chau	2009	12
5	Integrated nanoelectronics for the future Nature Materials ·R. Chau,B.S. Doyle,Suman Datta,J. Kavalieros,Kevin S. Zhang	2007	327
6	Challenges and opportunities of emerging nanotechnology for VLSI nanoelectronics R. Chau	2007	10
7	Indium Antimonide Based Quantum Well FETs for Ultra-High Speed Electronics ECS Meeting Abstracts ·T. Ashley,L. Buckle,M. T. Emeny,M. Fearn,D.G. Hayes,Florian Wessely,Richard Jefferies,K. M. Khan,Abnadee Salaeh,Jeff Powell,Michael Kwok Chi-on,Michael J. Uren,D. J. Wallis,Peter Wilding,Suman Datta,R. Chau	2006	3
8	Silicon nanotechnologies and emerging non-silicon nanoelectronics R. Chau	2006	2
9	Challenges and Opportunities of III-V Nanoelectronics for Future Logic Applications (Plenary Talk) R. Chau	2006	6
10	Novel insb-based quantum well transistors for ultra-high speed, low power logic applications T. Ashley,Dimitra Kentroti,L. Buckle,Andrew M. Bogatkevich,阿南健二,M. T. Emeny,M. Fearn,Nada Petričević,朱拧,Richard Jefferies,Trevor Martin,K. J. Nash,T. J. Phillips,William Milligan,佑子永吉,R. Chau	2005	44
11	Application of high-κ gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology Microelectronic Engineering ·R. Chau,J. Romero.,Suman Datta,G. Dewey,M. Doczy,B.S. Doyle,J. Kavalieros,B. Jin,M. Metz,Amlan Majumdar,M. Radosavljević	2005	104
12	Opportunities and challenges of III-V nanoelectronics for future high-speed, low-power logic applications R. Chau,Suman Datta,A. Majumdar	2005	86
13	Benchmarking nanotechnology for high-performance and low power logic transistor applicationsbreakdown → R. Chau	2005	482
14	Ultra high speed, very low power InSbb-based quantum well FETs for logic applications Sarah P. Ho,Dimitra Kentroti,Andrew M. Bogatkevich,阿南健二,M. T. Emeny,Xiao Juan Liu,S.A. Hareland,L. Haworth,D.G. Hayes,K.P. Hilton,Richard Jefferies,Trevor Martin,K. J. Nash,T. J. Phillips,William Milligan,R. Chau	2004	3
15	High mobility Si/SiGe strained channel MOS transistors with HfO/sub 2//TiN gate stack Suman Datta,G. Dewey,M. Doczy,B.S. Doyle,B. Jin,J. Kavalieros,R. Kotlyar,M. Metz,David Gaël,R. Chau	2004	65
16	Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout Barry M. Doyle,B. I. Boyanov,Suman Datta,M. Doczy,S.A. Hareland,B. Jin,J. Kavalieros,T. Linton,R. Rios,R. Chau	2004	163
17	A 50 nm depleted-substrate CMOS transistor (DST) R. Chau,J. Kavalieros,Barry M. Doyle,A. Murthy,Ellen Kesler,A. V. Dyomina,Douglas W. Barlage,Reza Arghavani,B. Roberds,M. Doczy	2002	73
18	Advanced Depleted-Substrate Transistors: Single-gate, Double-gate and Tri-gate R. Chau,B.S. Doyle,J. Kavalieros,Stephanie Amabella Prayogo,A. Murthy,M. Doczy,Reza Arghavani,Suman Datta	2002	49
19	Scalability of partially depleted SOI technology for sub-0.25 μm logic applications R. Chau,Reza Arghavani,Morteza S. Alavi,А. А. Макурина,Nur 'Izzati,S. Tyagi,Jian Xu,P. Packan,Shaoyong Yu,Peter Sandrini	2002	16
20	Inversion MOS capacitance extraction for high-leakage dielectrics using a transmission line equivalent circuit IEEE Electron Device Letters ·Douglas W. Barlage,Alejandra Rangel-Mendoza,J. Kavalieros,Manh-Cuong Nguyen,R. Chau	2000	40

About R. Chau

R. Chau is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials and Atomic and Molecular Physics, and Optics, having authored 57 papers that have together received 4.7k indexed citations. Recurring topics across this work include Semiconductor materials and devices (52 papers), Advancements in Semiconductor Devices and Circuit Design (51 papers), Nanowire Synthesis and Applications (20 papers), Integrated Circuits and Semiconductor Failure Analysis (9 papers), Ferroelectric and Negative Capacitance Devices (9 papers), Semiconductor Quantum Structures and Devices (5 papers), Ga2O3 and related materials (3 papers) and Advancements in Photolithography Techniques (2 papers). The work is most often cited by research in Electrical and Electronic Engineering (4.4k citations), Biomedical Engineering (1.4k citations), Atomic and Molecular Physics, and Optics (899 citations), Materials Chemistry (951 citations) and Condensed Matter Physics (135 citations). R. Chau has collaborated with scholars based in United States, United Kingdom and Sweden. Frequent co-authors include J. Kavalieros, Suman Datta, M. Doczy, M. Metz, B.S. Doyle, Barry M. Doyle, M. Bohr, G. Dewey, T. Ghani and M. Radosavljević. Their work appears in journals such as IEEE Electron Device Letters, IEEE Transactions on Electron Devices, Microelectronic Engineering, IEEE Transactions on Semiconductor Manufacturing and Electronics Letters.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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