Uddalak Bhattacharya

595 citations

20 papers · 445 indexed · h-index 11

Co-authors: Guomin Zhang Yong-Gee Ng Fatih Hamzaoglu Eric Karl Yuxiao Wang M. Bohr Zheng Guo John Keane
Topics: Advancements in Semiconductor Devices and Circuit Design (19 papers)Semiconductor materials and devices (18 papers)Low-power high-performance VLSI design (11 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Computer Networks and Communications
Journals: IEEE Journal of Solid-State Circuits Integration IEEE Solid-State Circuits Letters
Partner nations: United States India

In The Last Decade

Uddalak Bhattacharya

20 papers receiving 432 citations

Peers

Countries citing papers authored by Uddalak Bhattacharya

Since Specialization

Citations

This map shows the geographic impact of Uddalak Bhattacharya's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Uddalak Bhattacharya with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Uddalak Bhattacharya more than expected).

Fields of papers citing papers by Uddalak Bhattacharya

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Uddalak Bhattacharya. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Uddalak Bhattacharya. The network helps show where Uddalak Bhattacharya may publish in the future.

Co-authorship network of co-authors of Uddalak Bhattacharya

This figure shows the co-authorship network connecting the top 25 collaborators of Uddalak Bhattacharya. A scholar is included among the top collaborators of Uddalak Bhattacharya based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Uddalak Bhattacharya. Uddalak Bhattacharya is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A High Output Power 1V Charge Pump and Power Switch for Configurable, In-Field-Programmable Metal eFuse on Intel 4 Logic Technology 2022 ·2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ·(unknown),Jiabo Li,(unknown),Zhanping Chen,(unknown),Uddalak Bhattacharya,Eric Karl,Jaydeep P. Kulkarni	1
2	A 5-V-Program 1-V-Sense Anti-Fuse Technology Featuring On-Demand Sense and Integrated Power Delivery in a 22-nm Ultra Low Power FinFET Process 2020 ·IEEE Solid-State Circuits Letters ·S. Kulkarni,(unknown),(unknown),Fang‐Lin Chao,Yao‐Feng Chang,(unknown),(unknown),(unknown),(unknown),Jiabo Li,(unknown),B. Sell,Uddalak Bhattacharya,Ying Zhang	6
3	Design-Technology Co-Optimization of Anti-Fuse Memory on Intel 22nm FinFET Technology 2019 ·(unknown),S. Kulkarni,(unknown),(unknown),(unknown),(unknown),Guannan Liu,M Armstrong,(unknown),(unknown),S. Ramey,Uddalak Bhattacharya,B. Sell,Ying Zhang	3
4	Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology 2019 ·Integration ·(unknown),Uddalak Bhattacharya,Manish Kumar,Swapna Banerjee	1
5	A 0.9-μm² 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming 2017 ·IEEE Journal of Solid-State Circuits ·Zhanping Chen,S. Kulkarni,Vincent E. Dorgan,(unknown),Lei Jiang,Uddalak Bhattacharya	6
6	A High-Density Metal-Fuse Technology Featuring a 1.6 V Programmable Low-Voltage Bit Cell With Integrated 1 V Charge Pumps in 22 nm Tri-Gate CMOS 2016 ·IEEE Journal of Solid-State Circuits ·S. Kulkarni,Zhanping Chen,(unknown),(unknown),Uddalak Bhattacharya,Guomin Zhang	5
7	A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS Technology With Capacitive Charge-Sharing Write Assist Circuitry 2015 ·IEEE Journal of Solid-State Circuits ·Eric Karl,Zheng Guo,(unknown),(unknown),Yong-Gee Ng,Satyanand Nalam,Daeyeon Kim,John Keane,Xiaofei Wang,Uddalak Bhattacharya,Guomin Zhang	32
8	17.1 A 0.6V 1.5GHz 84Mb SRAM design in 14nm FinFET CMOS technology 2015 ·Eric Karl,Zheng Guo,(unknown),Jeffrey L. Miller,Yong-Gee Ng,Satyanand Nalam,Daeyeon Kim,John Keane,Uddalak Bhattacharya,Guomin Zhang	40
9	A 0.094um<sup>2</sup> high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV V<inf>MIN</inf> with read and write assist 2015 ·(unknown),Liqiong Wei,John Keane,Uddalak Bhattacharya,Eric Karl,Guomin Zhang	8
10	A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry 2012 ·IEEE Journal of Solid-State Circuits ·Eric Karl,Yuxiao Wang,Yong-Gee Ng,Zheng Guo,Fatih Hamzaoglu,Mesut Meterelliyoz,John Keane,Uddalak Bhattacharya,Guomin Zhang,Kaizad Mistry,M. Bohr	54
11	A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active V<inf>MIN</inf>-enhancing assist circuitry 2012 ·Eric Karl,Yuxiao Wang,Yong-Gee Ng,Zheng Guo,Fatih Hamzaoglu,Uddalak Bhattacharya,Guomin Zhang,Kaizad Mistry,M. Bohr	69
12	The impact of assist-circuit design for 22nm SRAM and beyond 2012 ·Eric Karl,Zheng Guo,Yong-Gee Ng,John Keane,Uddalak Bhattacharya,Guomin Zhang	24
13	A 32nm high-k and metal-gate anti-fuse array featuring a 1.01µm<sup>2</sup> 1T1C bit cell 2012 ·S. Kulkarni,Sangwoo Pae,Zhanping Chen,W. Hafez,(unknown),Anisur Rahman,(unknown),Uddalak Bhattacharya,(unknown),Guomin Zhang	3
14	Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design 2011 ·IEEE Design & Test of Computers ·Fatih Hamzaoglu,Yuxiao Wang,Pramod Kolar,Liqiong Wei,Yong-Gee Ng,Uddalak Bhattacharya,Guomin Zhang	12
15	Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM 2011 ·Yuxiao Wang,Eric Karl,Mesut Meterelliyoz,Fatih Hamzaoglu,Yong-Gee Ng,Swaroop Ghosh,Liqiong Wei,Uddalak Bhattacharya,Guomin Zhang	37
16	A 32nm High-<inf>k</inf> metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation 2010 ·(unknown),Pramod Kolar,Fatih Hamzaoglu,Yuxiao Wang,Eric Karl,Yong-Gee Ng,Uddalak Bhattacharya,Guomin Zhang	22
17	A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management 2010 ·IEEE Journal of Solid-State Circuits ·Yuxiao Wang,Uddalak Bhattacharya,Fatih Hamzaoglu,Pramod Kolar,Yong-Gee Ng,Liqiong Wei,(unknown),Guomin Zhang,M. Bohr	40
18	A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-¿ Metal-Gate CMOS Technology 2008 ·Fatih Hamzaoglu,Guomin Zhang,Yuxiao Wang,(unknown),Uddalak Bhattacharya,Zhanping Chen,Yong-Gee Ng,A. Pavlov,(unknown),M. Bohr	31
19	A 1.1 GHz 12 $\mu$A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications 2008 ·IEEE Journal of Solid-State Circuits ·Yuxiao Wang,(unknown),Uddalak Bhattacharya,Zhanping Chen,(unknown),Fatih Hamzaoglu,W. Hafez,(unknown),Pramod Kolar,S. Kulkarni,Jiefeng Lin,Yong-Gee Ng,(unknown),Liqiong Wei,Ying Zhang,Guomin Zhang,M. Bohr	49
20	ULTRAHIGH f_max AlInAs/GaInAs TRANSFERRED-SUBSTRATE HETEROJUNCTION BIPOLAR TRANSISTORS FOR INTEGRATED CIRCUITS APPLICATIONS 1998 ·International Journal of High Speed Electronics and Systems ·B. Agarwal,R. Pullela,Uddalak Bhattacharya,D. Mensa,(unknown),Lorene Samoska,James Guthrie,M.J.W. Rodwell	2

About Uddalak Bhattacharya

Uddalak Bhattacharya is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Infectious Diseases, having authored 20 papers that have together received 445 indexed citations. Recurring topics across this work include Advancements in Semiconductor Devices and Circuit Design (19 papers), Semiconductor materials and devices (18 papers) and Low-power high-performance VLSI design (11 papers). The work is most often cited by research in Hardware and Architecture (81 citations), Electrical and Electronic Engineering (427 citations) and Computer Networks and Communications (15 citations). Uddalak Bhattacharya has collaborated with scholars based in United States and India. Frequent co-authors include Guomin Zhang, Yong-Gee Ng, Fatih Hamzaoglu, Eric Karl, Yuxiao Wang, M. Bohr, Zheng Guo, John Keane, Liqiong Wei and Kaizad Mistry. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Integration and IEEE Solid-State Circuits Letters.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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