Yong-Gee Ng

729 citations

16 papers · 553 indexed · h-index 13

Impact in

Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing
- Parallel Computing and Optimization Techniques
Electrical and Electronic Engineering top 10%
- Low-power high-performance VLSI design
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Ferroelectric and Negative Capacitance Devices
- Advanced Memory and Neural Computing
- VLSI and FPGA Design Techniques

Papers in

Electrical and Electronic Engineering 16
- Semiconductor materials and devices 16
- Low-power high-performance VLSI design 13
- Advancements in Semiconductor Devices and Circuit Design 13
- Advancements in PLL and VCO Technologies 1
- Integrated Circuits and Semiconductor Failure Analysis 1
- Electrostatic Discharge in Electronics 1
- Advanced Memory and Neural Computing 1
Hardware and Architecture 1
- VLSI and Analog Circuit Testing 1

Co-authors: Guomin Zhang Fatih Hamzaoglu Yuxiao Wang Uddalak Bhattacharya Eric Karl M. Bohr Zheng Guo Pramod Kolar
Journals: IEEE Journal of Solid-State Circuits (7 papers)IEEE Design & Test of Computers (1 paper)
Partner nations: United States South Korea

In The Last Decade

Yong-Gee Ng

16 papers receiving 528 citations

Peers

Countries citing papers authored by Yong-Gee Ng

Since Specialization

Citations

This map shows the geographic impact of Yong-Gee Ng's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yong-Gee Ng with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yong-Gee Ng more than expected).

Fields of papers citing papers by Yong-Gee Ng

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yong-Gee Ng. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yong-Gee Ng. The network helps show where Yong-Gee Ng may publish in the future.

Co-authors

The 25 scholars most cited alongside Yong-Gee Ng, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Yong-Gee Ng Line = papers co-authored together Yong-Gee Ng links everyone, so they are left out of the graph.

All Works

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16 of 16 papers shown

#	Work
1	A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS Technology With Capacitive Charge-Sharing Write Assist Circuitry IEEE Journal of Solid-State Circuits ·Eric Karl, Zheng Guo, Maria Teresa Fatone, 马翔如, Yong-Gee Ng, Satyanand Nalam, Daeyeon Kim, John Keane, Xiaofei Wang, Uddalak Bhattacharya, Guomin Zhang	2015	32
2	17.1 A 0.6V 1.5GHz 84Mb SRAM design in 14nm FinFET CMOS technology Eric Karl, Zheng Guo, Maria Teresa Fatone, Jeffrey L. Miller, Yong-Gee Ng, Satyanand Nalam, Daeyeon Kim, John Keane, Uddalak Bhattacharya, Guomin Zhang	2015	40
3	A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry IEEE Journal of Solid-State Circuits ·Eric Karl, Yuxiao Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Mesut Meterelliyoz, John Keane, Uddalak Bhattacharya, Guomin Zhang, Kaizad Mistry, M. Bohr	2012	54
4	A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active V<inf>MIN</inf>-enhancing assist circuitry Eric Karl, Yuxiao Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Uddalak Bhattacharya, Guomin Zhang, Kaizad Mistry, M. Bohr	2012	69
5	The impact of assist-circuit design for 22nm SRAM and beyond Eric Karl, Zheng Guo, Yong-Gee Ng, John Keane, Uddalak Bhattacharya, Guomin Zhang	2012	24
6	Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design IEEE Design & Test of Computers ·Fatih Hamzaoglu, Yuxiao Wang, Pramod Kolar, Liqiong Wei, Yong-Gee Ng, Uddalak Bhattacharya, Guomin Zhang	2011	12
7	Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM Yuxiao Wang, Eric Karl, Mesut Meterelliyoz, Fatih Hamzaoglu, Yong-Gee Ng, Swaroop Ghosh, Liqiong Wei, Uddalak Bhattacharya, Guomin Zhang	2011	37
8	A 32nm High-<inf>k</inf> metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation Kenia Maribel Mieles Flores, Pramod Kolar, Fatih Hamzaoglu, Yuxiao Wang, Eric Karl, Yong-Gee Ng, Uddalak Bhattacharya, Guomin Zhang	2010	22
9	A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management IEEE Journal of Solid-State Circuits ·Yuxiao Wang, Uddalak Bhattacharya, Fatih Hamzaoglu, Pramod Kolar, Yong-Gee Ng, Liqiong Wei, 寿枝今井, Guomin Zhang, M. Bohr	2010	40
10	A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation IEEE Journal of Solid-State Circuits ·Pramod Kolar, Eric Karl, Paul McKeana, Fatih Hamzaoglu, Rudolph F. Kazarinov, Yong-Gee Ng, Yuxiao Wang, Guomin Zhang	2010	59
11	A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology IEEE Journal of Solid-State Circuits ·Fatih Hamzaoglu, Guomin Zhang, Yuxiao Wang, E Munos, Paul McKeana, Zhanping Chen, Yong-Gee Ng, A. Pavlov, Wenda Clenaghen, M. Bohr	2009	65
12	A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-¿ Metal-Gate CMOS Technology Fatih Hamzaoglu, Guomin Zhang, Yuxiao Wang, E Munos, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, A. Pavlov, Wenda Clenaghen, M. Bohr	2008	31
13	A 1.1 GHz 12 $\mu$A/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications IEEE Journal of Solid-State Circuits ·Yuxiao Wang, E Munos, Uddalak Bhattacharya, Zhanping Chen, Anthony G. Costantini, Fatih Hamzaoglu, W. Hafez, Zengjun Wang, Pramod Kolar, S. Kulkarni, Jiefeng Lin, Yong-Gee Ng, D. Ishimaru, Liqiong Wei, Ying Zhang, Guomin Zhang, M. Bohr	2008	49
14	An 18 Mb, 12.3 GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin Esmat A El-Ghafar, Shantha P. Kumar, M. Denham, Pietro Veronese, Yi Lu, Yong-Gee Ng, Kuniko Komuro, E. Kitching, R.H.M. Godol	2003	2
15	An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin IEEE Journal of Solid-State Circuits ·Esmat A El-Ghafar, Uma Bhattacharya, Talaat Lawendy, Carmach Iturrieta, G P Magalhaes, Yong-Gee Ng, 亜紀代谷田貝, 章泰金森, Zoltán Diószegi	1999	10
16	A 4.5 Megabit, 560MHz, 4.5 Gbyte/s High Bandwidth SRAM Julyanne Cristine Barbosa de Macedo Dos Santos, Asif Rahman, Viñán Andino, Yong-Gee Ng, Linda Rodriguez McRobbie, Kyle D. Rehak, E. Plonska	1997	7

About Yong-Gee Ng

Yong-Gee Ng is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Infectious Diseases, Organic Chemistry and Surgery, having authored 16 papers that have together received 553 indexed citations. Recurring topics across this work include Semiconductor materials and devices (16 papers), Low-power high-performance VLSI design (13 papers), Advancements in Semiconductor Devices and Circuit Design (13 papers), Advancements in PLL and VCO Technologies (1 paper), VLSI and Analog Circuit Testing (1 paper), Integrated Circuits and Semiconductor Failure Analysis (1 paper), Electrostatic Discharge in Electronics (1 paper) and Advanced Memory and Neural Computing (1 paper). The work is most often cited by research in Hardware and Architecture (113 citations), Electrical and Electronic Engineering (535 citations), Computer Networks and Communications (18 citations), Biomedical Engineering (21 citations) and Atomic and Molecular Physics, and Optics (14 citations). Yong-Gee Ng has collaborated with scholars based in United States and South Korea. Frequent co-authors include Guomin Zhang, Fatih Hamzaoglu, Yuxiao Wang, Uddalak Bhattacharya, Eric Karl, M. Bohr, Zheng Guo, Pramod Kolar, John Keane and Liqiong Wei. Their work appears in journals such as IEEE Journal of Solid-State Circuits and IEEE Design & Test of Computers.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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