John H. Lau

13.6k total citations · 2 hit papers
440 papers, 9.1k citations indexed

About

John H. Lau is a scholar working on Electrical and Electronic Engineering, Mechanical Engineering and Mechanics of Materials. According to data from OpenAlex, John H. Lau has authored 440 papers receiving a total of 9.1k indexed citations (citations by other indexed papers that have themselves been cited), including 393 papers in Electrical and Electronic Engineering, 106 papers in Mechanical Engineering and 68 papers in Mechanics of Materials. Recurrent topics in John H. Lau's work include Electronic Packaging and Soldering Technologies (331 papers), 3D IC and TSV technologies (304 papers) and Additive Manufacturing and 3D Printing Technologies (58 papers). John H. Lau is often cited by papers focused on Electronic Packaging and Soldering Technologies (331 papers), 3D IC and TSV technologies (304 papers) and Additive Manufacturing and 3D Printing Technologies (58 papers). John H. Lau collaborates with scholars based in United States, Taiwan and Singapore. John H. Lau's co-authors include S. W. Ricky Lee, Yi-Hsin Pao, Peter A. Engel, Chris Chang, V. Kripesh, Xiaowu Zhang, Kripesh Vaidyanathan, T.C. Chai, Cheryl Selvanayagam and Walter Dauksher and has published in prestigious journals such as Applied Physics Letters, Journal of Applied Physics and Journal of Bone and Joint Surgery.

In The Last Decade

John H. Lau

416 papers receiving 8.1k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Flip Chip Technologies

1995 489 citations John H. Lau profile →
Recent Advances and Trends in Advanced Packaging

2022 325 citations John H. Lau IEEE Transactions on Components Packaging and Manufacturing Technology profile →

Peers

Countries citing papers authored by John H. Lau

Since Specialization

Citations

This map shows the geographic impact of John H. Lau's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John H. Lau with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John H. Lau more than expected).

Fields of papers citing papers by John H. Lau

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John H. Lau. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John H. Lau. The network helps show where John H. Lau may publish in the future.

Co-authorship network of co-authors of John H. Lau

This figure shows the co-authorship network connecting the top 25 collaborators of John H. Lau. A scholar is included among the top collaborators of John H. Lau based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with John H. Lau. John H. Lau is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	State of the Art and Outlooks of Cu–Cu Hybrid Bonding 2025 ·IEEE Transactions on Components Packaging and Manufacturing Technology ·John H. Lau	0
2	Flip Chip, Hybrid Bonding, Fan-In, and Fan-Out Technology 2024 ·John H. Lau	7
3	State-of-the-Art in Chiplets Horizontal Communications 2023 ·Journal of Microelectronics and Electronic Packaging ·John H. Lau	1
4	Recent Advances and Trends in Chiplet Design and Heterogeneous Integration Packaging 2023 ·Journal of Electronic Packaging ·John H. Lau	30
5	State-of-the-Art and Outlooks for 2.3D IC Integration 2023 ·IMAPSource Proceedings ·John H. Lau	1
6	Chiplet Design and Heterogeneous Integration Packaging 2023 ·John H. Lau	24
7	Heterogeneous Integration Hybrid Substrate with Ajinomoto Build-Up Film 2023 ·IMAPSource Proceedings ·(unknown), John H. Lau, (unknown), (unknown), (unknown), (unknown), Yi‐Hau Chen, (unknown)	1
8	Reliability of 6-Side Molded Panel-Level Chip-Scale Packages (PLCSPs) 2021 ·John H. Lau, Cheng-Ta Ko, (unknown), (unknown), Kai-Ming Yang, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), David Cheng, (unknown)	1
9	Wafer bumping, assembly, and reliability assessment of μbumps with 5μm pads on 10μm pitch for 3D IC integration 2012 ·(unknown), Chau‐Jie Zhan, John H. Lau, (unknown), (unknown), (unknown), (unknown), Shangwei Chen, (unknown), (unknown), Yu-Min Lin, Kuo‐Shu Kao, Cheng-Ta Ko, (unknown), (unknown), Ming‐Jer Kao	5
10	Electromigration in Ni/Sn intermetallic micro bump joint for 3D IC chip stacking 2011 ·Yu-Min Lin, Chau‐Jie Zhan, (unknown), John H. Lau, Tai‐Hong Chen, (unknown), Ming‐Jer Kao, Tian Tian, K. N. Tu	37
11	A novel, wafer-level stacking method for low-chip yield and non-uniform, chip-size wafers for MEMS and 3D SIP applications 2008 ·C.S. Premachandran, John H. Lau, Ling Xie, (unknown), (unknown), (unknown), (unknown), Won Kyoung Choi	18
12	Computational analysis on the effects of double-layer build-up printed circuit board on the wafer level chip scale package (WLCSP) assembly with Pb-free solder joints 2001 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·John H. Lau, (unknown)	3
13	Nonlinear fracture mechanics analysis of wafer level chip scale package solder joints with cracks 2000 ·John H. Lau, (unknown), Chris Chang	11
14	Creep behaviors of flip chip on board with 96.5Sn-3.5Ag and 100In lead-free solder joints 2000 ·John H. Lau, (unknown)	20
15	Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies 1999 ·John H. Lau, Chris Chang, Chih‐Chiang Chen	3
16	Chip scale package (CSP) : design, materials, processes, reliability, and applications 1999 ·McGraw-Hill eBooks ·John H. Lau, S. W. Ricky Lee	16
17	Electronic packaging: design, materials, process, and reliability 1998 ·CERN Document Server (European Organization for Nuclear Research) ·John H. Lau, Cheuk‐Kit Wong, Wataru Nakayama, John L. Prince	118
18	How to select underfill materials for solder bumped flip chips on low cost substrates 1998 ·John H. Lau, Chris Chang	18
19	Cooling assessment and distribution of heat dissipation of a cavity down plastic ball grid array package - NuBGA 1997 ·John H. Lau, Tony Chen	12
20	Binary Pattern Reconstruction from Projections [Z] (Remark on Algorithm 445). 1973 ·Communications of the ACM ·John H. Lau	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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