S. Orain

468 citations

24 papers · 352 indexed · h-index 10

Co-authors: Y. Scudeller Vincent Fiori Thierry Brousse R.A. Bianchi R. Gwoziecki G. Ghibaudo G. Reimbold C. Raynaud
Topics: Electronic Packaging and Soldering Technologies (9 papers)3D IC and TSV technologies (7 papers)Advancements in Semiconductor Devices and Circuit Design (7 papers)
Cited by: Electrical and Electronic Engineering Mechanics of Materials Electronic, Optical and Magnetic Materials
Journals: International Journal of Heat and Mass Transfer IEEE Transactions on Electron Devices Thin Solid Films
Partner nations: France Netherlands Switzerland

In The Last Decade

S. Orain

24 papers receiving 330 citations

Peers

Countries citing papers authored by S. Orain

Since Specialization

Citations

This map shows the geographic impact of S. Orain's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Orain with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Orain more than expected).

Fields of papers citing papers by S. Orain

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Orain. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Orain. The network helps show where S. Orain may publish in the future.

Co-authorship network of co-authors of S. Orain

This figure shows the co-authorship network connecting the top 25 collaborators of S. Orain. A scholar is included among the top collaborators of S. Orain based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Orain. S. Orain is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Multi-Level Cu Interconnects Integration and Characterization with Air Gap as Ultra-Low K Material Formed using a Hybrid Sacrificial Oxide / Polymer Stack 2007 ·L.G. Gosset,F. Gaillard,D. Bouchu,(unknown),J. de Pontcharra,S. Orain,O. Cueto,(unknown),O. Louveau,G. Passemard,J. Torrès	9
2	Numerical Analysis of the Reliability of Cu/low-k Bond Pad Interconnections Under Wire Pull Test: Application of a 3D Energy Based Failure Criterion 2007 ·(unknown),Vincent Fiori,S. Orain,O. van der Sluis	7
3	3D Multi Scale Modeling of Wire Bonding Induced Peeling in Cu/Low-k Interconnects: Application of an Energy Based Criteria and Correlations with Experiments 2007 ·Vincent Fiori,(unknown),(unknown),(unknown),S. Orain	20
4	Crack initiation in Cu-interconnect structures 2006 ·Microelectronic Engineering ·(unknown),(unknown),Dominique Leguillon,M. Dupeux,Muriel Braccini,S. Orain	2
5	Reliability issues in Cu/low-k structures regarding the initiation of stress-voiding or crack failure 2006 ·Microelectronic Engineering ·S. Orain,(unknown),Vincent Fiori,X. Federspiel	8
6	Stress Memorization Technique (SMT) Optimization for 45nm CMOS 2006 ·C. Ortolland,P. Morin,(unknown),(unknown),(unknown),S. Orain,F. Leverd,P.A. Stolk,(unknown),F. Arnaud	22
7	Tensile Contact Etch Stop Nitride for nMOS Performance Enhancement: Influence of the Film Morphology 2006 ·ECS Meeting Abstracts ·P. Morin,C. Madhukar Reddy,C. Ortolland,S. Orain,(unknown),F. Arnaud,K. Barla	1
8	Mobility Enhancement by Strained Nitride Liners for 65nm CMOS Logic Design Features 2006 ·MRS Proceedings ·C. Ortolland,P. Morin,F. Arnaud,S. Orain,C. Madhukar Reddy,(unknown),P.A. Stolk	2
9	FEM-based method to determine mechanical stress evolution during process flow in microelectronics, application to stress–voiding 2006 ·Microelectronics Reliability ·S. Orain,J. C. Barbé,X. Federspiel,(unknown),H. Jaouen	4
10	Virtual Prototyping based Design Optimization of the Substrate, Leadframe, and Flip Chip Package Families with Low-k Technology 2006 ·W.D. van Driel,(unknown),(unknown),(unknown),(unknown),S. Orain	8
11	Performance boost of scaled Si PMOS through novel SiGe stressor for HP CMOS 2005 ·D. Chanemougame,S. Monfray,F. Bœuf,(unknown),N. Loubet,(unknown),Vincent Fiori,S. Orain,F. Leverd,D. Delille,B. Duriez,(unknown),D. Dutartre,T. Skotnicki	7
12	Integration of a mechanically reliable 65-nm node technology for low-k and ULK interconnects with various substrate and package types 2005 ·Cindy Goldberg,(unknown),Vincent Fiori,Robert Fox,Kai‐Uwe Hess,(unknown),A. Humbert,(unknown),(unknown),(unknown),S. Orain,Scott Pozder,(unknown),(unknown),(unknown),(unknown),(unknown)	13
13	90nm node damascene copper stress voiding model and lifetime extrapolation methodology 2005 ·X. Federspiel,S. Orain	1
14	FEM-based method to determine mechanical stress evolution during process flow in microelectronics. Application to stress-voiding 2004 ·S. Orain,J. C. Barbé,X. Federspiel,(unknown),H. Jaouen	5
15	Electrical characterization and mechanical modeling of process induced strain in 65 nm CMOS technology 2004 ·C. Ortolland,S. Orain,José M. de la Rosa,P. Morin,F. Arnaud,(unknown),A. Poncet,P.A. Stolk	13
16	Electrical Analysis of Mechanical Stress Induced by STI in Short MOSFETs Using Externally Applied Stress 2004 ·IEEE Transactions on Electron Devices ·C. Gallon,G. Reimbold,G. Ghibaudo,R.A. Bianchi,R. Gwoziecki,S. Orain,(unknown),C. Raynaud,H. Dansas	78
17	Experimental investigation on the thermal contact resistance between gold coating and ceramic substrates 2001 ·Thin Solid Films ·(unknown),Thien‐Phap Nguyen,(unknown),S. Orain,Y. Scudeller,(unknown)	26
18	Use of genetic algorithms for the simultaneous estimation of thin films thermal conductivity and contact resistances 2001 ·International Journal of Heat and Mass Transfer ·S. Orain,Y. Scudeller,(unknown),Thierry Brousse	42
19	Thermal conductivity of ZrO thin films 2000 ·International Journal of Thermal Sciences ·S. Orain,Y. Scudeller,Thierry Brousse	34
20	Mesure de la conductivité thermique des couches minces d’oxyde 1999 ·Revue de Métallurgie ·S. Orain,Y. Scudeller,Thierry Brousse	2

About S. Orain

S. Orain is a scholar working on Mechanics of Materials, Electrical and Electronic Engineering and Electronic, Optical and Magnetic Materials, having authored 24 papers that have together received 352 indexed citations. Recurring topics across this work include Electronic Packaging and Soldering Technologies (9 papers), 3D IC and TSV technologies (7 papers) and Advancements in Semiconductor Devices and Circuit Design (7 papers). The work is most often cited by research in Electrical and Electronic Engineering (247 citations), Mechanics of Materials (68 citations) and Electronic, Optical and Magnetic Materials (40 citations). S. Orain has collaborated with scholars based in France, Netherlands and Switzerland. Frequent co-authors include Y. Scudeller, Vincent Fiori, Thierry Brousse, R.A. Bianchi, R. Gwoziecki, G. Ghibaudo, G. Reimbold, C. Raynaud, H. Dansas and C. Gallon. Their work appears in journals such as International Journal of Heat and Mass Transfer, IEEE Transactions on Electron Devices and Thin Solid Films.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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