G. Dewey

2.4k citations

23 papers · 1.5k indexed · h-index 18

Electrical and Electronic Engineering top 2%
- Semiconductor materials and devices 23
- Advancements in Semiconductor Devices and Circuit Design 21
- Integrated Circuits and Semiconductor Failure Analysis 5
- Ferroelectric and Negative Capacitance Devices 5
Atomic and Molecular Physics, and Optics top 10%
- Semiconductor Quantum Structures and Devices 2
Biomedical Engineering top 10%
- Nanowire Synthesis and Applications 8
Materials Chemistry
- Electronic and Structural Properties of Oxides 2
Hardware and Architecture
Electronic, Optical and Magnetic Materials
- Ga2O3 and related materials 2

Co-authors: R. Chau M. Radosavljević J. Kavalieros M. Metz W. Rachmady B. Chu-Kung R. Pillarisetty Niloy Mukherjee
Cited by: Electrical and Electronic Engineering Atomic and Molecular Physics, and Optics Biomedical Engineering
Journals: IEEE Electron Device Letters (2 papers)Microelectronic Engineering (1 paper)ORCA Online Research @Cardiff (Cardiff University) (1 paper)
Partner nations: United States United Kingdom

In The Last Decade

G. Dewey

23 papers receiving 1.5k citations

Peers

Countries citing papers authored by G. Dewey

Since Specialization

Citations

This map shows the geographic impact of G. Dewey's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Dewey with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Dewey more than expected).

Fields of papers citing papers by G. Dewey

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by G. Dewey. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Dewey. The network helps show where G. Dewey may publish in the future.

Co-authorship network

The 25 scholars most cited alongside G. Dewey, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with G. Dewey Line = papers co-authored together G. Dewey links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Study of TFET non-ideality effects for determination of geometry and defect density requirements for sub-60mV/dec Ge TFET Uygar E. Avci,B. Chu-Kung,Ashish Agrawal,G. Dewey,Hung V. Le,Rafael Rios,Daniel H. Morris,Sayed Hasan,R. Kotlyar,J. Kavalieros,Ian A. Young	2015	36
2	Experimental observation and physics of “negative” capacitance and steeper than 40mV/decade subthreshold swing in Al<inf>0.83</inf>In<inf>0.17</inf>N/AlN/GaN MOS-HEMT on SiC substrate Han Wui Then,Sandeepan DasGupta,M. Radosavljević,Ф Х Камилов,B. Chu-Kung,G. Dewey,Shao-qing Guan,Xiaoqin Gao,J. Kavalieros,Niloy Mukherjee,M. Metz,Matthew J. Oliver,R. Pillarisetty,Valluri Rao,Seung-Hun Sung,Guanhua Yang,R. Chau	2013	21
3	III-V Quantum Well Field Effect Transistors on Silicon for Future High Performance and Low Power Logic Applications G. Dewey,M. Radosavljević,Niloy Mukherjee	2011	2
4	MOVPE III–V material growth on silicon substrates and its comparison to MBE for future high performance and low power logic applications Niloy Mukherjee,archaeologyuhi,B. Chu-Kung,G. Dewey,Suvorova Anna Viktorovna,J. M. Fastenau,J. Kavalieros,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,M. Radosavljević,T. Stewart,Han Wui Then,Kazys Gaivenis,R. Chau	2011	24
5	Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to-source separation M. Radosavljević,G. Dewey,Dipanjan Basu,archaeologyuhi,B. Chu-Kung,J. M. Fastenau,Sanaz Kabehie,J. Kavalieros,Hung V. Le,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,Niloy Mukherjee,L. Pan,R. Pillarisetty,W. Rachmady,Uday Shah,Han Wui Then,R. Chau	2011	117
6	Fabrication, characterization, and physics of III–V heterojunction tunneling Field Effect Transistors (H-TFET) for steep sub-threshold swing G. Dewey,B. Chu-Kung,archaeologyuhi,J. M. Fastenau,J. Kavalieros,R. Kotlyar,W. K. Liu,D. Lubyshev,M. Metz,Niloy Mukherjee,J. E. Erdman,R. Pillarisetty,M. Radosavljević,Han Wui Then,R. Chau	2011	280
7	Non-planar, multi-gate InGaAs quantum well field effect transistors with high-K gate dielectric and ultra-scaled gate-to-drain/gate-to-source separation for low power logic applications M. Radosavljević,G. Dewey,J. M. Fastenau,J. Kavalieros,R. Kotlyar,B. Chu-Kung,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,Niloy Mukherjee,L. Pan,R. Pillarisetty,W. Rachmady,Uday Shah,R. Chau	2010	78
8	High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture R. Pillarisetty,B. Chu-Kung,S. Corcoran,G. Dewey,J. Kavalieros,Lina M. Barrios,R. Kotlyar,Hung V. Le,A. V. Dyomina,M. Metz,Niloy Mukherjee,Junghyo Nah,W. Rachmady,M. Radosavljević,Uday Shah,Huang Bao-huaa,Han Wui Then,David Gaël,R. Chau	2010	80
9	Advanced high-K gate dielectric for high-performance short-channel In<inf>0.7</inf>Ga<inf>0.3</inf>As quantum well field effect transistors on silicon substrate for low power logic applications M. Radosavljević,B. Chu-Kung,S. Corcoran,G. Dewey,Mantu K. Hudait,J. M. Fastenau,J. Kavalieros,W. K. Liu,D. Lubyshev,M. Metz,Annamaria Murdocca,Niloy Mukherjee,W. Rachmady,Uday Shah,R. Chau	2009	111
10	Logic performance evaluation and transport physics of Schottky-gate III–V compound semiconductor quantum well field effect transistors for power supply voltages (V<inf>CC</inf>) ranging from 0.5v to 1.0v G. Dewey,R. Kotlyar,R. Pillarisetty,M. Radosavljević,Titash Rakshit,Han Wui Then,R. Chau	2009	12
11	High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications ORCA Online Research @Cardiff (Cardiff University) ·M. Radosavljević,T. Ashley,A. D. Andreev,S. D. Coomber,G. Dewey,M. T. Emeny,M. Fearn,D.G. Hayes,K.P. Hilton,Mantu K. Hudait,Richard Jefferies,Trevor Martin,R. Pillarisetty,W. Rachmady,Titash Rakshit,Stuart Smith,Michael J. Uren,D. J. Wallis,佑子永吉,R. Chau	2008	72
12	Carrier Transport in High-Mobility III–V Quantum-Well Transistors and Performance Impact for High-Speed Low-Power Logic Applications IEEE Electron Device Letters ·G. Dewey,Mantu K. Hudait,Zeng Xin,R. Pillarisetty,W. Rachmady,M. Radosavljević,Titash Rakshit,R. Chau	2008	54
13	Heterogeneous integration of enhancement mode in_0.7ga_0.3as quantum well transistor on silicon substrate using thin (les 2 μm) composite buffer architecture for high-speed and low-voltage ( 0.5 v) logic applications Mantu K. Hudait,G. Dewey,Suman Datta,J. M. Fastenau,J. Kavalieros,管子,D. Lubyshev,R. Pillarisetty,W. Rachmady,M. Radosavljević,Titash Rakshit,R. Chau	2007	54
14	Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering J. Kavalieros,Barry M. Doyle,Suman Datta,G. Dewey,M. Doczy,B. Jin,A. V. Dyomina,M. Metz,W. Rachmady,M. Radosavljević,Uday Shah,David Gaël,R. Chau	2006	178
15	Application of high-κ gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology Microelectronic Engineering ·R. Chau,J. Romero.,Suman Datta,G. Dewey,M. Doczy,B.S. Doyle,J. Kavalieros,B. Jin,M. Metz,Amlan Majumdar,M. Radosavljević	2005	104
16	Emerging silicon and non-silicon nanoelectronic devices: opportunities and challenges for future high-performance and low-power computational applications (invited paper) R. Chau,J. Romero.,Тюков П. А.,G. Dewey,M. Doczy,Barry M. Doyle,J. Kavalieros,B. Jin,M. Metz,M. A. Toqan,M. Radosavljević	2005	8
17	High mobility Si/SiGe strained channel MOS transistors with HfO/sub 2//TiN gate stack Suman Datta,G. Dewey,M. Doczy,B.S. Doyle,B. Jin,J. Kavalieros,R. Kotlyar,M. Metz,David Gaël,R. Chau	2004	65
18	Advanced CMOS transistors in the nanotechnology era for high-performance, low-power logic applications R. Chau,M. Doczy,Barry M. Doyle,Suman Datta,G. Dewey,J. Kavalieros,B. Jin,M. Metz,A. Majumdar,M. Radosavljević	2004	12
19	Advanced si and sige strained channel NMOS and PMOS transistors with high-k/metal-gate stack Suman Datta,J. Romero.,G. Dewey,M. Doczy,Barry M. Doyle,B. Jin,J. Kavalieros,M. Metz,A. Majumdar,M. Radosavljević,R. Chau	2004	10
20	30 nm physical gate length CMOS transistors with 1.0 ps n-MOS and 1.7 ps p-MOS gate delays R. Chau,J. Kavalieros,B. Roberds,Richard E. Schenker,A. V. Dyomina,Douglas W. Barlage,Barry M. Doyle,Reza Arghavani,A. Murthy,G. Dewey	2002	81

About G. Dewey

G. Dewey is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering, Electronic, Optical and Magnetic Materials, Condensed Matter Physics and Atomic and Molecular Physics, and Optics, having authored 23 papers that have together received 1.5k indexed citations. Recurring topics across this work include Semiconductor materials and devices (23 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers), Nanowire Synthesis and Applications (8 papers), Integrated Circuits and Semiconductor Failure Analysis (5 papers), Ferroelectric and Negative Capacitance Devices (5 papers), Semiconductor Quantum Structures and Devices (2 papers), Ga2O3 and related materials (2 papers) and Electronic and Structural Properties of Oxides (2 papers). The work is most often cited by research in Electrical and Electronic Engineering (1.5k citations), Atomic and Molecular Physics, and Optics (313 citations), Biomedical Engineering (417 citations), Materials Chemistry (206 citations) and Hardware and Architecture (19 citations). G. Dewey has collaborated with scholars based in United States and United Kingdom. Frequent co-authors include R. Chau, M. Radosavljević, J. Kavalieros, M. Metz, W. Rachmady, B. Chu-Kung, R. Pillarisetty, Niloy Mukherjee, J. M. Fastenau and R. Kotlyar. Their work appears in journals such as IEEE Electron Device Letters, Microelectronic Engineering and ORCA Online Research @Cardiff (Cardiff University).

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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