John Safran

460 citations

19 papers · 343 indexed · h-index 9

Impact in

Hardware and Architecture top 5%
- Physical Unclonable Functions (PUFs) and Hardware Security
Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices
- 3D IC and TSV technologies
- Integrated Circuits and Semiconductor Failure Analysis
- Advanced Memory and Neural Computing
- Radio Frequency Integrated Circuit Design
- Electronic Packaging and Soldering Technologies
- Advancements in Semiconductor Devices and Circuit Design

Papers in

Hardware and Architecture 4
- Physical Unclonable Functions (PUFs) and Hardware Security 4
Electrical and Electronic Engineering 19
- Semiconductor materials and devices 8
- Integrated Circuits and Semiconductor Failure Analysis 5
- 3D IC and TSV technologies 5
- Advanced Memory and Neural Computing 4
- Radio Frequency Integrated Circuit Design 3
- Advancements in PLL and VCO Technologies 2

Co-authors: Subramanian S. Iyer C. Kothandaraman T. Kirihata Norman Robson D. Moy M. Sherony Mohammed Talbi N. Zamdmer
Journals: IEEE Journal of Solid-State Circuits (1 paper)IEEE Transactions on Semiconductor Manufacturing (1 paper)IEEE Transactions on Device and Materials Reliability (1 paper)Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena (1 paper)
Partner nations: United States Netherlands India

In The Last Decade

John Safran

18 papers receiving 326 citations

Peers

Countries citing papers authored by John Safran

Since Specialization

Citations

This map shows the geographic impact of John Safran's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John Safran with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John Safran more than expected).

Fields of papers citing papers by John Safran

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John Safran. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John Safran. The network helps show where John Safran may publish in the future.

Co-authorship network

The 25 scholars most cited alongside John Safran, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with John Safran Line = papers co-authored together John Safran links everyone, so they are left out of the graph.

All Works

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19 of 19 papers shown

#	Work
1	3Di DC-DC Buck Micro Converter with TSVs, Grind Side Inductors, and Deep Trench Decoupling Capacitors in 32nm SOI CMOS John Safran, Jafari Sirizi Mohammad, HyunJoo Kim, AM Koelmans, Majid Shabani, 直子山王, F. A. C. Wiegant -RID --, Santhosh K Mishra, Chuanying Geng, Garry Vebrian, Joyeeta Nag, Sami Rosenblatt, Norman Robson, M. Angyal, E. J. Dzura, Xuejie Du, James Pape, Subramanian S. Iyer	2016	2
2	Deep Trench Capacitor in Three Dimensional Through Silicon via Keepout Area for Electrostatic Discharge Protection IEEE Transactions on Semiconductor Manufacturing ·S. V. Yamtchikov, PINAR PINARLI ÖNEN, Daniella Particulariseta Kindangen, John Safran, McDowelJR, Cooke Schnieder	2016	3
3	Deep trench capacitor in three dimensional through silicon via keepout area for electrostatic discharge protection S. V. Yamtchikov, PINAR PINARLI ÖNEN, Daniella Particulariseta Kindangen, John Safran, McDowelJR, Cooke Schnieder	2015	0
4	Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability Erstes Intermezzo, Giuseppe La Rosa, F. Chen, Gregorio Manzanares Pérez, E. J. Dzura, C. Kothandaraman, C. J. Collins, W. Landers, Lynn Moss, Z. Domic, John Safran, Somnath Ghosh, S. Mittl, Dimitris P. Ioannou, Tae-Suk Ro-Choi, Daniel S. Berger, Subramanian S. Iyer	2015	3
5	Through silicon via (TSV) effects on devices in close proximity - the role of mobile ion penetration - characterization and mitigation C. Kothandaraman, Sidney Cohen, C. Parks, John Golz, Mariana Palumbo, Sami Rosenblatt, John Safran, C. J. Collins, W. Landers, Lynn Moss, Z. Domic, Andreas Martin, K. Petrarca, Erstes Intermezzo, E. J. Dzura, Norman Robson, Subramanian S. Iyer	2014	5
6	Field Tolerant Dynamic Intrinsic Chip ID Using 32 nm High-K/Metal Gate SOI Embedded DRAM IEEE Journal of Solid-State Circuits ·Sami Rosenblatt, Olivier Reggiani, Chuanying Geng, John Safran, Norman Robson, T. Kirihata, Subramanian S. Iyer	2013	37
7	Copper through silicon via (TSV) for 3D integration C. Kothandaraman, Spyros D. Chatziefthymiou, John Safran, John Golz, Santhosh K Mishra, Erstes Intermezzo, E. J. Dzura, W. Landers, R. Volant, K. Petrarca, Yini Wang, Timothy D. Sullivan, PaekJungha, Norman Robson, Buwei Wang, Chizhevskii O. C., K. P. N.,	2012	6
8	3D copper TSV integration, testing and reliability Erstes Intermezzo, E. J. Dzura, W. Landers, C. Kothandaraman, Spyros D. Chatziefthymiou, Paul Andry, Cornelia Tsang, E. Sprogis, R. Volant, K. Petrarca, Andria Cezar Barroso, John Safran, Timothy D. Sullivan, F. Chen, Lucile Humbert, Buwei Wang, R. W. Liptak, Siedmy Chyril Lengkong, Subramanian S. Iyer	2011	91
9	3D stackable 32nm High-K/Metal Gate SOI embedded DRAM prototype John Golz, John Safran, Warren C Mcvey, Татьяна Михайловна Габдурахимова, Ming Yin, A.J Udzhuhu, Zvi Golbart, Yan Sun, Chuanying Geng, Spyros D. Chatziefthymiou, Santhosh K Mishra, C. Kothandaraman, Olivier Reggiani, J. Barth, Norman Robson, T. Kirihata, K. Rim, Subramanian S. Iyer	2011	15
10	Reliability Investigation of NiPtSi Electrical Fuse With Different Programming Mechanisms IEEE Transactions on Device and Materials Reliability ·Chunyan Tian, D. Moy, 喜勝青柳, Rajapboyeva Nilufar Raximboyev Musobek Komiljon o`g`li, C. Kothandaraman, John Safran, S. Wu, Norman Robson, Subramanian S. Iyer	2008	6
11	A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS Puche Pinto, A. D. Roese, T. Kirihata, C. Kothandaraman, https://orcid.org/0000-0001-9323-4911, Kara Hargrove, Brian Reed, Norman Robson, John Safran, GRZEGORZ WESOŁOWSKI, Subramanian S. Iyer	2008	18
12	A Compact eFUSE Programmable Array Memory for SOI CMOS John Safran, Roberta Cupido, Julián Andrés España Peña, C. Kothandaraman, Chuanying Geng, Xiang Chen, Keren Wu, Deok‐kee Kim, https://orcid.org/0000-0001-9323-4911, D. Moy, Norman Robson, T. Kirihata, Subramanian S. Iyer	2007	20
13	Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips M. Sailee, John Safran, C. Kothandaraman, Chuanying Geng, Xiang Chen, Keren Wu, Roberta Cupido, D. Moy, T. Kirihata, Subramanian S. Iyer	2007	53
14	Reliability investigation of NiPtSi electrical fuse with different programming mechanisms Sunita, D. Moy, Rajapboyeva Nilufar Raximboyev Musobek Komiljon o`g`li, C. Kothandaraman, John Safran, S. Wu, Norman Robson, Alexander Wäschle	2007	1
15	Reliability Qualification of CoSi2 Electrical Fuse for 90Nm Technology Fangqiu Fu, Xiujun Deng, C. Kothandaraman, John Safran, غلامعلی شرزهای, Norman Robson, Alexander Wäschle	2006	14
16	A 12dBm 320GHz GBW distributed amplifier in a 0.12μm SOI CMOS Jonghae Kim, Jean‐Olivier Plouchart, N. Zamdmer, Dini Indah Cahyani, R. Groves, M. Sherony, Yue Tan, Mohammed Talbi, John Safran, L. Wagner	2004	20
17	Highly manufacturable 40-50 GHz VCOs in a 120 nm system-on-chip SOI technology Jonghae Kim, Jean‐Olivier Plouchart, N. Zamdmer, N. Fong, M. Sherony, Yue Tan, Mohammed Talbi, Robert Trzcinski, John Safran, Ramalingam Anuja, Mohamed Shabaan Atrees, J.W. Sleight, C. Sheraw, A. Ray, L. Wagner	2004	5
18	A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate Jonghae Kim, Asit K. Ray, L. Wagner, Jean‐Olivier Plouchart, N. Zamdmer, M. Sherony, Yue Tan, Thomas Tippelt, Robert Trzcinski, Mohammed Talbi, John Safran	2003	39
19	EL5: One tool for advanced x-ray and chrome on glass mask making Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena ·Nur Firmansyah, John G. Hartley, H. C. Pfeiffer, Наталія Донських, T. R. Groves, S. Oguey, Xian Lei Fu, Mohammad Amin Ghanavati, Gregory J. Dick, Ana Lucia Gancino Lloacana, Michael S. Gordon, Rodney Kendall, C.H. Levy, J F Holmes, Chris Robinson, Zhang Cj, John Safran, H. Tjokrohusodo, G. M. Fazley Elahee	1998	5

About John Safran

John Safran is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Surfaces, Coatings and Films, Atomic and Molecular Physics, and Optics and Cellular and Molecular Neuroscience, having authored 19 papers that have together received 343 indexed citations. Recurring topics across this work include Semiconductor materials and devices (8 papers), Integrated Circuits and Semiconductor Failure Analysis (5 papers), 3D IC and TSV technologies (5 papers), Advanced Memory and Neural Computing (4 papers), Physical Unclonable Functions (PUFs) and Hardware Security (4 papers), Radio Frequency Integrated Circuit Design (3 papers), Semiconductor materials and interfaces (3 papers) and Advancements in PLL and VCO Technologies (2 papers). The work is most often cited by research in Hardware and Architecture (92 citations), Electrical and Electronic Engineering (327 citations), Cellular and Molecular Neuroscience (32 citations), Biomedical Engineering (47 citations) and Atomic and Molecular Physics, and Optics (25 citations). John Safran has collaborated with scholars based in United States, Netherlands and India. Frequent co-authors include Subramanian S. Iyer, C. Kothandaraman, T. Kirihata, Norman Robson, D. Moy, M. Sherony, Mohammed Talbi, N. Zamdmer, Jean‐Olivier Plouchart and Sami Rosenblatt. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Semiconductor Manufacturing, IEEE Transactions on Device and Materials Reliability and Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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