Kaushik Vaidyanathan

447 total citations
26 papers, 320 citations indexed

About

Kaushik Vaidyanathan is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Kaushik Vaidyanathan has authored 26 papers receiving a total of 320 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Electrical and Electronic Engineering, 11 papers in Hardware and Architecture and 1 paper in Computer Networks and Communications. Recurrent topics in Kaushik Vaidyanathan's work include Advancements in Semiconductor Devices and Circuit Design (9 papers), Semiconductor materials and devices (9 papers) and Advanced Memory and Neural Computing (8 papers). Kaushik Vaidyanathan is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (9 papers), Semiconductor materials and devices (9 papers) and Advanced Memory and Neural Computing (8 papers). Kaushik Vaidyanathan collaborates with scholars based in United States and India. Kaushik Vaidyanathan's co-authors include Larry Pileggi, Renzhi Liu, Bishnu Prasad Das, Lars W. Liebmann, Franz Franchetti, Andrzej J. Strojwas, Kafai Lai, Daniel Morris, Tanay Karnik and Daniel H. Morris and has published in prestigious journals such as Journal of Micro/Nanolithography MEMS and MOEMS, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits and International Conference on Computer Aided Design.

In The Last Decade

Kaushik Vaidyanathan

26 papers receiving 309 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Kaushik Vaidyanathan United States 10 256 191 49 34 21 26 320
Justin S. J. Wong United Kingdom 11 256 1.0× 187 1.0× 21 0.4× 17 0.5× 24 1.1× 27 383
Norman Robson United States 12 269 1.1× 124 0.6× 46 0.9× 17 0.5× 38 1.8× 29 300
Anteneh Gebregiorgis Germany 10 255 1.0× 55 0.3× 36 0.7× 46 1.4× 17 0.8× 32 286
Wantong Li United States 11 305 1.2× 43 0.2× 43 0.9× 75 2.2× 18 0.9× 33 357
Chien-Chen Lin Taiwan 10 387 1.5× 141 0.7× 25 0.5× 29 0.9× 61 2.9× 14 432
John Safran United States 9 327 1.3× 92 0.5× 32 0.7× 15 0.4× 18 0.9× 19 343
Moritz Fieback Netherlands 11 227 0.9× 58 0.3× 53 1.1× 23 0.7× 6 0.3× 45 252
Yen-Kai Chen Taiwan 7 474 1.9× 42 0.2× 76 1.6× 92 2.7× 21 1.0× 11 547
Liang Yan China 5 214 0.8× 50 0.3× 50 1.0× 43 1.3× 42 2.0× 13 271
Rajiv Gupta United States 8 310 1.2× 211 1.1× 8 0.2× 24 0.7× 31 1.5× 17 419

Countries citing papers authored by Kaushik Vaidyanathan

Since Specialization
Citations

This map shows the geographic impact of Kaushik Vaidyanathan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kaushik Vaidyanathan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kaushik Vaidyanathan more than expected).

Fields of papers citing papers by Kaushik Vaidyanathan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kaushik Vaidyanathan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kaushik Vaidyanathan. The network helps show where Kaushik Vaidyanathan may publish in the future.

Co-authorship network of co-authors of Kaushik Vaidyanathan

This figure shows the co-authorship network connecting the top 25 collaborators of Kaushik Vaidyanathan. A scholar is included among the top collaborators of Kaushik Vaidyanathan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kaushik Vaidyanathan. Kaushik Vaidyanathan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
2.
Vaidyanathan, Kaushik, et al.. (2021). HotGauge: A Methodology for Characterizing Advanced Hotspots in Modern and Next Generation Processors. 163–175. 10 indexed citations
3.
Liu, Huichu, Sasikanth Manipatruni, Daniel H. Morris, et al.. (2019). Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin–Orbit Devices Toward 100-mV Logic. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 5(1). 1–9. 14 indexed citations
4.
Vaidyanathan, Kaushik, Daniel H. Morris, Uygar E. Avci, et al.. (2018). Improving Energy Efficiency of Low-Voltage Logic by Technology-Driven Design. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 4(1). 10–18. 4 indexed citations
5.
Subramanian, Lavanya, et al.. (2018). Closed yet Open DRAM: Achieving Low Latency and High Performance in DRAM Memory Systems. 65. 1–6. 3 indexed citations
6.
Morris, Daniel H., Uygar E. Avci, Kaushik Vaidyanathan, et al.. (2017). Novel TFET circuits for high-performance energy-efficient heterogeneous MOSFET/TFET logic. 1–2. 3 indexed citations
7.
Liebmann, Lars W., Lawrence T. Pileggi, & Kaushik Vaidyanathan. (2016). Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling. SPIE eBooks. 8 indexed citations
8.
Karnik, Tanay, et al.. (2015). Systemic optimization of on-chip thermoelectric cooling. 52–57. 3 indexed citations
9.
Sumbul, H. Ekin, et al.. (2015). A synthesis methodology for application-specific logic-in-memory designs. 1–6. 4 indexed citations
10.
Vaidyanathan, Kaushik, Lars W. Liebmann, Andrzej J. Strojwas, & Larry Pileggi. (2014). Sub-20 nm design technology co-optimization for standard cell logic. International Conference on Computer Aided Design. 124–131. 4 indexed citations
11.
Vaidyanathan, Kaushik, Lars W. Liebmann, Kafai Lai, et al.. (2014). Exploiting sub-20-nm complementary metal-oxide semiconductor technology challenges to design affordable systems-on-chip. Journal of Micro/Nanolithography MEMS and MOEMS. 14(1). 11007–11007. 7 indexed citations
12.
Vaidyanathan, Kaushik, et al.. (2014). Building trusted ICs using split fabrication. 1–6. 76 indexed citations
13.
Vaidyanathan, Kaushik, Lars W. Liebmann, Andrzej J. Strojwas, & Larry Pileggi. (2014). Sub-20 nm design technology co-optimization for standard cell logic. 124–131. 6 indexed citations
14.
Vaidyanathan, Kaushik, et al.. (2014). Efficient and secure intellectual property (IP) design with split fabrication. 13–18. 48 indexed citations
15.
Vaidyanathan, Kaushik, Renzhi Liu, Lars W. Liebmann, et al.. (2013). Rethinking ASIC design with next generation lithography and process integration. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 8684. 86840C–86840C. 10 indexed citations
16.
Huang, Wenbin, Daniel Morris, Neal Lafferty, et al.. (2012). <title>Local loops for robust inter-layer routing at sub-20 nm nodes</title>. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 8327. 83270D–83270D. 4 indexed citations
17.
Vaidyanathan, Kaushik, et al.. (2012). Design Automation Framework for Application-Specific Logic-in-Memory Blocks. 125–132. 18 indexed citations
18.
Vaidyanathan, Kaushik, Daniel Morris, Neal Lafferty, et al.. (2012). <title>Design and manufacturability tradeoffs in unidirectional and bidirectional standard cell layouts in 14 nm node</title>. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 8327. 83270K–83270K. 20 indexed citations
19.
Morris, Daniel, Kaushik Vaidyanathan, Neal Lafferty, et al.. (2011). Design of embedded memory and logic based on pattern constructs. Symposium on VLSI Technology. 104–105. 12 indexed citations
20.
Morris, Daniel, Vyacheslav Rovner, Larry Pileggi, Andrzej J. Strojwas, & Kaushik Vaidyanathan. (2010). Enabling application-specific integrated circuits on limited pattern constructs. 139–140. 14 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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