J. Saxena

1.2k citations

20 papers · 919 indexed · h-index 11

Electrical and Electronic Engineering top 5%
Hardware and Architecture top 0.5%
Control and Systems Engineering top 10%
Software
Computer Networks and Communications

Co-authors: Kenneth M. Butler L. Whetsel Vinay Jayaram N.V. Arvind Sandip Kundu G. Hetherington Ankit Jain Dhiraj K. Pradhan
Topics: VLSI and Analog Circuit Testing (19 papers)Integrated Circuits and Semiconductor Failure Analysis (17 papers)Low-power high-performance VLSI design (3 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Control and Systems Engineering
Journals: IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsLecture notes in electrical engineeringJournal of Low Power Electronics
Partner nations: United States India Germany

In The Last Decade

J. Saxena

17 papers receiving 872 citations

Peers

Countries citing papers authored by J. Saxena

Since Specialization

Citations

This map shows the geographic impact of J. Saxena's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Saxena with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Saxena more than expected).

Fields of papers citing papers by J. Saxena

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Saxena. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Saxena. The network helps show where J. Saxena may publish in the future.

Co-authorship network of co-authors of J. Saxena

This figure shows the co-authorship network connecting the top 25 collaborators of J. Saxena. A scholar is included among the top collaborators of J. Saxena based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Saxena. J. Saxena is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Intelligent and Efficient Electrical Systems 2017 ·Lecture notes in electrical engineering ·(unknown),J. Saxena	7
2	Multidimensional Test Escape Rate Modeling 2009 ·IEEE Design & Test of Computers ·Kenneth M. Butler,John M. Carulli,J. Saxena,(unknown),W.R. Daasch	4
3	Low Power Test for Nanometer System-on-Chips (SoCs) 2008 ·Journal of Low Power Electronics ·Srivaths Ravi,Rubin Parekhji,J. Saxena	9
4	Modeling Test Escape Rate as a Function of Multiple Coverages 2008 ·Kenneth M. Butler,John M. Carulli,J. Saxena	8
5	Minimizing power consumption in scan testing: pattern generation and DFT techniques 2005 ·Kenneth M. Butler,J. Saxena,Ankit Jain,(unknown),(unknown),G. Hetherington	225
6	A case study of ir-drop in structured at-speed testing 2004 ·J. Saxena,Kenneth M. Butler,Vinay Jayaram,Sandip Kundu,N.V. Arvind,(unknown),(unknown)	306
7	Scan-based transition fault testing - implementation and low cost test challenges 2003 ·J. Saxena,Kenneth M. Butler,(unknown),R. Raghuraman,(unknown),(unknown),D.J. Campbell,(unknown)	98
8	Signature analysis under a delay fault model 2003 ·J. Saxena,Dhiraj K. Pradhan	0
9	A design for testability scheme to reduce test application time in full scan 2003 ·Dhiraj K. Pradhan,J. Saxena	18
10	Design for testability of asynchronous sequential circuits 2002 ·J. Saxena,Dhiraj K. Pradhan	0
11	IC diagnosis: preventing wars and war stories 2002 ·J. Saxena	0
12	An analysis of power reduction techniques in scan testing 2002 ·J. Saxena,Kenneth M. Butler,L. Whetsel	138
13	Computer-aided fault to defect mapping (CAFDM) for defect diagnosis 2002 ·Zlatan Stanojević,H. Balachandran,D.M.H. Walker,(unknown),(unknown),J. Saxena,Kenneth M. Butler	12
14	Integrating automated diagnosis into the testing and failure analysis operations 2002 ·Kenneth M. Butler,(unknown),John Platt,Alex K. Jones,J. Saxena	2
15	Bridging fault diagnosis in the absence of physical information 2002 ·D.B. Lavo,B. Chess,T. Larrabee,F.J. Ferguson,J. Saxena,Kenneth M. Butler	13
16	On applying non-classical defect models to automated diagnosis 2002 ·J. Saxena,Kenneth M. Butler,H. Balachandran,D.B. Lavo,B. Chess,T. Larrabee,F.J. Ferguson	21
17	An empirical study on the effects of test type ordering on overall test efficiency 2002 ·Kenneth M. Butler,J. Saxena	18
18	A method to derive compact test sets for path delay faults in combinational circuits 2002 ·J. Saxena,Dhiraj K. Pradhan	28
19	Automated diagnosis in testing and failure analysis 1997 ·IEEE Design & Test of Computers ·Kenneth M. Butler,(unknown),John Platt,(unknown),J. Saxena	10
20	A novel scheme to reduce test application time in circuits with full scan 1995 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Dhiraj K. Pradhan,J. Saxena	2

About J. Saxena

J. Saxena is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Software, having authored 20 papers that have together received 919 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (19 papers), Integrated Circuits and Semiconductor Failure Analysis (17 papers) and Low-power high-performance VLSI design (3 papers). The work is most often cited by research in Hardware and Architecture (898 citations), Electrical and Electronic Engineering (903 citations) and Control and Systems Engineering (135 citations). J. Saxena has collaborated with scholars based in United States, India and Germany. Frequent co-authors include Kenneth M. Butler, L. Whetsel, Vinay Jayaram, N.V. Arvind, Sandip Kundu, G. Hetherington, Ankit Jain, Dhiraj K. Pradhan, D.J. Campbell and R. Raghuraman. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Lecture notes in electrical engineering and Journal of Low Power Electronics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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