J. Saxena

1.2k total citations
20 papers, 919 citations indexed

About

J. Saxena is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, J. Saxena has authored 20 papers receiving a total of 919 indexed citations (citations by other indexed papers that have themselves been cited), including 19 papers in Hardware and Architecture, 19 papers in Electrical and Electronic Engineering and 3 papers in Control and Systems Engineering. Recurrent topics in J. Saxena's work include VLSI and Analog Circuit Testing (19 papers), Integrated Circuits and Semiconductor Failure Analysis (17 papers) and Low-power high-performance VLSI design (3 papers). J. Saxena is often cited by papers focused on VLSI and Analog Circuit Testing (19 papers), Integrated Circuits and Semiconductor Failure Analysis (17 papers) and Low-power high-performance VLSI design (3 papers). J. Saxena collaborates with scholars based in United States, India and Germany. J. Saxena's co-authors include Kenneth M. Butler, L. Whetsel, Vinay Jayaram, N.V. Arvind, Sandip Kundu, G. Hetherington, Ankit Jain, Dhiraj K. Pradhan, D.J. Campbell and R. Raghuraman and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Lecture notes in electrical engineering and Journal of Low Power Electronics.

In The Last Decade

J. Saxena

17 papers receiving 872 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
J. Saxena United States	11	903	898	135	19	10	20	919
Seongmoon Wang United States	17	902 1.0×	907 1.0×	135 1.0×	17 0.9×	21 2.1×	38	929
P. Wohl United States	15	688 0.8×	708 0.8×	112 0.8×	33 1.7×	12 1.2×	38	722
Kohei Miyase Japan	19	1.1k 1.2×	1.0k 1.1×	104 0.8×	23 1.2×	29 2.9×	75	1.1k
Jeff Rearick United States	12	594 0.7×	609 0.7×	95 0.7×	24 1.3×	27 2.7×	38	638
Vivek Chickermane United States	15	597 0.7×	573 0.6×	50 0.4×	19 1.0×	14 1.4×	43	623
Brion Keller United States	15	1.1k 1.2×	1.0k 1.2×	173 1.3×	32 1.7×	29 2.9×	42	1.1k
Sreejit Chakravarty United States	13	507 0.6×	485 0.5×	55 0.4×	27 1.4×	19 1.9×	57	538
E. Volkerink United States	10	381 0.4×	390 0.4×	70 0.5×	18 0.9×	14 1.4×	12	402
B. Kruseman Netherlands	14	576 0.6×	516 0.6×	31 0.2×	12 0.6×	6 0.6×	35	600
I. Hartanto United States	8	357 0.4×	373 0.4×	68 0.5×	38 2.0×	11 1.1×	15	386

Countries citing papers authored by J. Saxena

Since Specialization

Citations

This map shows the geographic impact of J. Saxena's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Saxena with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Saxena more than expected).

Fields of papers citing papers by J. Saxena

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Saxena. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Saxena. The network helps show where J. Saxena may publish in the future.

Co-authorship network of co-authors of J. Saxena

This figure shows the co-authorship network connecting the top 25 collaborators of J. Saxena. A scholar is included among the top collaborators of J. Saxena based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Saxena. J. Saxena is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Saxena, J., et al.. (2017). Intelligent and Efficient Electrical Systems. Lecture notes in electrical engineering. 7 indexed citations

Butler, Kenneth M., et al.. (2009). Multidimensional Test Escape Rate Modeling. IEEE Design & Test of Computers. 26(5). 74–82. 4 indexed citations

Ravi, Srivaths, Rubin Parekhji, & J. Saxena. (2008). Low Power Test for Nanometer System-on-Chips (SoCs). Journal of Low Power Electronics. 4(1). 81–100. 9 indexed citations

Butler, Kenneth M., John M. Carulli, & J. Saxena. (2008). Modeling Test Escape Rate as a Function of Multiple Coverages. 1–9. 8 indexed citations

Butler, Kenneth M., et al.. (2005). Minimizing power consumption in scan testing: pattern generation and DFT techniques. 355–364. 225 indexed citations

Saxena, J., et al.. (2004). A case study of ir-drop in structured at-speed testing. 1. 1098–1104. 306 indexed citations

Saxena, J., et al.. (2003). Scan-based transition fault testing - implementation and low cost test challenges. 1120–1129. 98 indexed citations

Saxena, J. & Dhiraj K. Pradhan. (2003). Signature analysis under a delay fault model. 285–290.

Pradhan, Dhiraj K. & J. Saxena. (2003). A design for testability scheme to reduce test application time in full scan. 55–60. 18 indexed citations

10.

Saxena, J. & Dhiraj K. Pradhan. (2002). Design for testability of asynchronous sequential circuits. c 18. 518–522.

11.

Saxena, J.. (2002). IC diagnosis: preventing wars and war stories. 1138–1138.

12.

Saxena, J., Kenneth M. Butler, & L. Whetsel. (2002). An analysis of power reduction techniques in scan testing. 670–677. 138 indexed citations

13.

Stanojević, Zlatan, et al.. (2002). Computer-aided fault to defect mapping (CAFDM) for defect diagnosis. 729–738. 12 indexed citations

14.

Butler, Kenneth M., et al.. (2002). Integrating automated diagnosis into the testing and failure analysis operations. 934–934. 2 indexed citations

15.

Lavo, D.B., B. Chess, T. Larrabee, et al.. (2002). Bridging fault diagnosis in the absence of physical information. 887–893. 13 indexed citations

16.

Saxena, J., Kenneth M. Butler, H. Balachandran, et al.. (2002). On applying non-classical defect models to automated diagnosis. 748–757. 21 indexed citations

17.

Butler, Kenneth M. & J. Saxena. (2002). An empirical study on the effects of test type ordering on overall test efficiency. 408–416. 18 indexed citations

18.

Saxena, J. & Dhiraj K. Pradhan. (2002). A method to derive compact test sets for path delay faults in combinational circuits. 724–733. 28 indexed citations

19.

Butler, Kenneth M., et al.. (1997). Automated diagnosis in testing and failure analysis. IEEE Design & Test of Computers. 14(3). 83–89. 10 indexed citations

20.

Pradhan, Dhiraj K. & J. Saxena. (1995). A novel scheme to reduce test application time in circuits with full scan. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 14(12). 1577–1586. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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