Kohei Miyase

1.4k total citations
75 papers, 1.1k citations indexed

About

Kohei Miyase is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Control and Systems Engineering. According to data from OpenAlex, Kohei Miyase has authored 75 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 68 papers in Electrical and Electronic Engineering, 66 papers in Hardware and Architecture and 7 papers in Control and Systems Engineering. Recurrent topics in Kohei Miyase's work include VLSI and Analog Circuit Testing (63 papers), Integrated Circuits and Semiconductor Failure Analysis (62 papers) and Advancements in Photolithography Techniques (16 papers). Kohei Miyase is often cited by papers focused on VLSI and Analog Circuit Testing (63 papers), Integrated Circuits and Semiconductor Failure Analysis (62 papers) and Advancements in Photolithography Techniques (16 papers). Kohei Miyase collaborates with scholars based in Japan, United States and Germany. Kohei Miyase's co-authors include Seiji Kajihara, Xiaoqing Wen, S.M. Reddy, Kewal K. Saluja, Irith Pomeranz, Laung‐Terng Wang, Kunio Ishida, Tatsuya Suzuki, Patrick Girard and Yasuo Satô and has published in prestigious journals such as IEEE Transactions on Aerospace and Electronic Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Transactions on Design Automation of Electronic Systems.

In The Last Decade

Kohei Miyase

73 papers receiving 1.1k citations

Peers

Kohei Miyase
Seongmoon Wang United States
Jeff Rearick United States
Sreejit Chakravarty United States
P. Wohl United States
M. Lousberg Netherlands
S. Patil United States
Brion Keller United States
A. Krstić United States
F. P. M. Beenker Netherlands
Artur Jutman Estonia
Seongmoon Wang United States
Kohei Miyase
Citations per year, relative to Kohei Miyase Kohei Miyase (= 1×) peers Seongmoon Wang

Countries citing papers authored by Kohei Miyase

Since Specialization
Citations

This map shows the geographic impact of Kohei Miyase's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kohei Miyase with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kohei Miyase more than expected).

Fields of papers citing papers by Kohei Miyase

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kohei Miyase. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kohei Miyase. The network helps show where Kohei Miyase may publish in the future.

Co-authorship network of co-authors of Kohei Miyase

This figure shows the co-authorship network connecting the top 25 collaborators of Kohei Miyase. A scholar is included among the top collaborators of Kohei Miyase based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kohei Miyase. Kohei Miyase is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yan, Aibin, et al.. (2019). Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments. IEEE Transactions on Aerospace and Electronic Systems. 56(2). 1163–1171. 75 indexed citations
2.
Miyase, Kohei, et al.. (2019). A Static Method for Analyzing Hotspot Distribution on the LSI. 73–78.
3.
Lu, Shyue-Kung, et al.. (2019). Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM. Journal of Electronic Testing. 35(4). 485–495. 2 indexed citations
4.
Holst, Stefan, Eric Schneider, Michael A. Kochte, et al.. (2017). Analysis and mitigation or IR-Drop induced scan shift-errors. 1–8. 7 indexed citations
5.
Miyase, Kohei, Matthias Sauer, Bernd Becker, Xiaoqing Wen, & Seiji Kajihara. (2015). Identification of high power consuming areas with gate type and logic level information. 1–6. 12 indexed citations
6.
Syafalni, Infall, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, & Kohei Miyase. (2014). Soft-error tolerant TCAMs for high-reliability packet classifications. 471–474. 9 indexed citations
7.
Satô, Yasuo, et al.. (2012). Low Power BIST for Scan-Shift and Capture Power. 173–178. 25 indexed citations
8.
Miyase, Kohei, et al.. (2012). LCTI–SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing. IEEE Design and Test. 30(4). 60–70. 6 indexed citations
9.
Kochte, Michael A., et al.. (2011). SAT-based capture-power reduction for at-speed broadcast-scan-based test compression architectures. 33–38. 3 indexed citations
10.
Miyase, Kohei, K. Noda, Kazumi Hatayama, et al.. (2011). Distribution-Controlled X-Identification for Effective Reduction of Launch-Induced IR-Drop in At-Speed Scan Testing. IEICE Transactions on Information and Systems. E94.D(6). 1216–1226. 1 indexed citations
11.
Miyase, Kohei, et al.. (2011). Transition-Time-Relation based capture-safety checking for at-speed scan test generation. 1–4. 3 indexed citations
12.
Dilillo, Luigi, Alberto Bosio, Patrick Girard, et al.. (2010). Is test power reduction through X-filling good enough?. 1–1. 5 indexed citations
13.
Huang, Jiun-Lang, et al.. (2009). Power Supply Noise Reduction for At-Speed Scan Testing in Linear-Decompression Environment. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 28(11). 1767–1776. 11 indexed citations
15.
Polian, Ilia, Yusuke Nakamura, Kohei Miyase, et al.. (2008). Diagnosis of Realistic Defects Based on the X-Fault Model. 1–4. 5 indexed citations
16.
Wen, Xiaoqing, Kohei Miyase, Tatsuya Suzuki, et al.. (2006). A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation. 251–258. 38 indexed citations
17.
Kajihara, Seiji, et al.. (2004). Don't Care Identification and Statistical Encoding for Test Data Compression. IEICE Transactions on Information and Systems. 87(3). 544–550. 1 indexed citations
18.
Reddy, S.M., Kohei Miyase, Seiji Kajihara, & Irith Pomeranz. (2003). On test data volume reduction for multiple scan chain designs. ACM Transactions on Design Automation of Electronic Systems. 8(4). 460–469. 7 indexed citations
19.
Kajihara, Seiji, Kōji Ishida, & Kohei Miyase. (2002). Average Power Reduction in Scan Testing by Test Vector Modification. IEICE Transactions on Information and Systems. 85(10). 1483–1489. 1 indexed citations
20.
Kajihara, Seiji & Kohei Miyase. (2001). On identifying don't care inputs of test patterns for combinational circuits. International Conference on Computer Aided Design. 364–369. 55 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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