T. Larrabee

1.9k citations

33 papers · 1.3k indexed · 1 hit paper · h-index 19

Hardware and Architecture top 0.5%
Electrical and Electronic Engineering top 5%
Computational Theory and Mathematics top 2%
Software top 5%
Artificial Intelligence top 10%

Co-authors: B. Chess D.B. Lavo F.J. Ferguson I. Hartanto André L. M. Freitas Donald E. Knuth J. Saxena Kenneth M. Butler
Topics: VLSI and Analog Circuit Testing (28 papers)Integrated Circuits and Semiconductor Failure Analysis (23 papers)Software Testing and Debugging Techniques (7 papers)
Cited by: Hardware and Architecture Software Computational Theory and Mathematics
Journals: IEEE Transactions on Computers IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Software
Partner nations: United States

In The Last Decade

T. Larrabee

33 papers receiving 1.2k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Test pattern generation using Boolean satisfiability

1992 518 citations T. Larrabee IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems profile →

Peers

Countries citing papers authored by T. Larrabee

Since Specialization

Citations

This map shows the geographic impact of T. Larrabee's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Larrabee with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Larrabee more than expected).

Fields of papers citing papers by T. Larrabee

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Larrabee. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Larrabee. The network helps show where T. Larrabee may publish in the future.

Co-authorship network of co-authors of T. Larrabee

This figure shows the co-authorship network connecting the top 25 collaborators of T. Larrabee. A scholar is included among the top collaborators of T. Larrabee based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Larrabee. T. Larrabee is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Successful Interventions to Eliminate Achievement Gaps in STEM Courses 2020 ·T. Larrabee,(unknown),(unknown),(unknown)	3
2	Efficient generation of test patterns using Boolean difference 2003 ·T. Larrabee	34
3	Comprehensive fault diagnosis of combinational circuits 2002 ·D.B. Lavo,T. Larrabee	1
4	A scalable, loadable custom programmable logic device for solving Boolean satisfiability problems 2002 ·(unknown),T. Larrabee	7
5	Diagnosis of realistic bridging faults with single stuck-at information 2002 ·B. Chess,D.B. Lavo,F.J. Ferguson,T. Larrabee	27
6	Test pattern generation for current testable faults in static CMOS circuits 2002 ·F.J. Ferguson,T. Larrabee	4
7	Probabilistic mixed-model fault diagnosis 2002 ·D.B. Lavo,B. Chess,T. Larrabee,I. Hartanto	38
8	Beyond the byzantine generals: unexpected behavior and bridging fault diagnosis 2002 ·D.B. Lavo,T. Larrabee,B. Chess	66
9	Generating test patterns for bridge faults in CMOS ICs 2002 ·B. Chess,T. Larrabee	10
10	Testing CMOS logic gates for: realistic shorts 2002 ·B. Chess,André L. M. Freitas,F.J. Ferguson,T. Larrabee	31
11	Bridging fault diagnosis in the absence of physical information 2002 ·D.B. Lavo,B. Chess,T. Larrabee,F.J. Ferguson,J. Saxena,Kenneth M. Butler	13
12	On applying non-classical defect models to automated diagnosis 2002 ·J. Saxena,Kenneth M. Butler,H. Balachandran,D.B. Lavo,B. Chess,T. Larrabee,F.J. Ferguson	21
13	Creating small fault dictionaries [logic circuit fault diagnosis] 1999 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·B. Chess,T. Larrabee	72
14	Logic testing of bridging faults in CMOS integrated circuits 1998 ·IEEE Transactions on Computers ·B. Chess,T. Larrabee	21
15	Diagnosing realistic bridging faults with single stuck-at information 1998 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·D.B. Lavo,B. Chess,T. Larrabee,F.J. Ferguson	40
16	Charge-based fault simulation for CMOS network breaks 1996 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown),F.J. Ferguson,T. Larrabee	18
17	SOME FUTURE DIRECTIONS IN FAULT MODELING AND TEST PATTERN GENERATION RESEARCH 1992 ·F.J. Ferguson,T. Larrabee	2
18	EVIDENCE FOR A SATISFIABILITY THRESHOLD FOR RANDOM 3CNF FORMULAS 1992 ·T. Larrabee,(unknown)	42
19	Efficient generation of test patterns using Boolean satisfiability 1990 ·T. Larrabee	19
20	Gambit: A Prototyping Approach to Video Game Design 1984 ·IEEE Software ·T. Larrabee,(unknown)	4

About T. Larrabee

T. Larrabee is a scholar working on Hardware and Architecture, Software and Theoretical Computer Science, having authored 33 papers that have together received 1.3k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (28 papers), Integrated Circuits and Semiconductor Failure Analysis (23 papers) and Software Testing and Debugging Techniques (7 papers). The work is most often cited by research in Hardware and Architecture (1.1k citations), Software (153 citations) and Computational Theory and Mathematics (301 citations). T. Larrabee has collaborated with scholars based in United States. Frequent co-authors include B. Chess, D.B. Lavo, F.J. Ferguson, I. Hartanto, André L. M. Freitas, Donald E. Knuth, J. Saxena, Kenneth M. Butler, H. Balachandran and D. C. Williams. Their work appears in journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Software.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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