I. Hartanto

500 total citations
15 papers, 386 citations indexed

About

I. Hartanto is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, I. Hartanto has authored 15 papers receiving a total of 386 indexed citations (citations by other indexed papers that have themselves been cited), including 15 papers in Hardware and Architecture, 15 papers in Electrical and Electronic Engineering and 3 papers in Control and Systems Engineering. Recurrent topics in I. Hartanto's work include Integrated Circuits and Semiconductor Failure Analysis (15 papers), VLSI and Analog Circuit Testing (15 papers) and Radiation Effects in Electronics (7 papers). I. Hartanto is often cited by papers focused on Integrated Circuits and Semiconductor Failure Analysis (15 papers), VLSI and Analog Circuit Testing (15 papers) and Radiation Effects in Electronics (7 papers). I. Hartanto collaborates with scholars based in United States and China. I. Hartanto's co-authors include W.K. Fuchs, T. Larrabee, V. Boppana, D.B. Lavo, Alexander P. Maxwell, J.H. Patel, B. Chess, Sreejit Chakravarty, E.M. Rudnick and Srikanth Venkataraman and has published in prestigious journals such as ACM Transactions on Design Automation of Electronic Systems.

In The Last Decade

I. Hartanto

15 papers receiving 370 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
I. Hartanto United States 8 373 357 68 38 12 15 386
Sreejit Chakravarty United States 13 485 1.3× 507 1.4× 55 0.8× 27 0.7× 17 1.4× 57 538
P. Wohl United States 15 708 1.9× 688 1.9× 112 1.6× 33 0.9× 4 0.3× 38 722
Emil Gizdarski United States 9 345 0.9× 343 1.0× 63 0.9× 15 0.4× 10 0.8× 24 356
C. Hora Netherlands 13 447 1.2× 482 1.4× 36 0.5× 11 0.3× 29 2.4× 27 507
P. Franco United States 8 347 0.9× 377 1.1× 32 0.5× 31 0.8× 3 0.3× 13 401
D.B.I. Feltham United States 9 308 0.8× 317 0.9× 30 0.4× 17 0.4× 13 1.1× 13 344
Srikanth Venkataraman United States 11 395 1.1× 387 1.1× 42 0.6× 43 1.1× 23 1.9× 33 408
Jeff Rearick United States 12 609 1.6× 594 1.7× 95 1.4× 24 0.6× 10 0.8× 38 638
T.J. Chakraborty United States 12 504 1.4× 507 1.4× 28 0.4× 40 1.1× 9 0.8× 28 533
E. Volkerink United States 10 390 1.0× 381 1.1× 70 1.0× 18 0.5× 4 0.3× 12 402

Countries citing papers authored by I. Hartanto

Since Specialization
Citations

This map shows the geographic impact of I. Hartanto's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by I. Hartanto with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites I. Hartanto more than expected).

Fields of papers citing papers by I. Hartanto

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by I. Hartanto. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by I. Hartanto. The network helps show where I. Hartanto may publish in the future.

Co-authorship network of co-authors of I. Hartanto

This figure shows the co-authorship network connecting the top 25 collaborators of I. Hartanto. A scholar is included among the top collaborators of I. Hartanto based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with I. Hartanto. I. Hartanto is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

15 of 15 papers shown
1.
Hartanto, I., et al.. (2017). Cell-Aware ATPG to Improve Defect Coverage for FPGA IPs and Next Generation Zynq® MPSoCs. 157–162. 1 indexed citations
2.
Hartanto, I., et al.. (2007). Using FPGA configuration memory to accelerate yield learning for advanced process. 511–516. 1 indexed citations
3.
Li, Xiaoyu & I. Hartanto. (2007). Using FPGA configuration memory to accelerate yield learning for advanced process. 1 indexed citations
4.
Lavo, D.B., I. Hartanto, & T. Larrabee. (2003). Multiplets, models, and the search for meaning: improving per-test fault diagnosis. 250–259. 76 indexed citations
5.
Venkataraman, S., I. Hartanto, & W.K. Fuchs. (2002). Dynamic diagnosis of sequential circuits based on stuck-at faults. 135. 198–203. 18 indexed citations
6.
Boppana, V., I. Hartanto, & W.K. Fuchs. (2002). Fault diagnosis using state information. 135. 96–103. 7 indexed citations
7.
Boppana, V., I. Hartanto, & W.K. Fuchs. (2002). Full fault dictionary storage based on labeled tree encoding. 174–179. 48 indexed citations
8.
Lavo, D.B., B. Chess, T. Larrabee, & I. Hartanto. (2002). Probabilistic mixed-model fault diagnosis. 1084–1093. 38 indexed citations
9.
Hartanto, I., V. Boppana, J.H. Patel, & W.K. Fuchs. (2002). Diagnostic test pattern generation for sequential circuits. 196–202. 25 indexed citations
10.
Maxwell, Alexander P., et al.. (2002). Comparing functional and structural tests. 87 indexed citations
11.
Hartanto, I., V. Boppana, & W.K. Fuchs. (2002). Diagnostic fault equivalence identification using redundancy information and structural analysis. 294–302. 29 indexed citations
12.
Boppana, V., I. Hartanto, & W.K. Fuchs. (2002). Characterization and implicit identification of sequential indistinguishability. c 20. 376–380. 3 indexed citations
13.
Hartanto, I., Srikanth Venkataraman, W.K. Fuchs, et al.. (2001). Diagnostic simulation of stuck-at faults in sequential circuits using compact lists. ACM Transactions on Design Automation of Electronic Systems. 6(4). 471–489. 3 indexed citations
14.
Fuchs, W.K. & I. Hartanto. (1996). Diagnostic test set evaluation and enhancement. 1 indexed citations
15.
Venkataraman, Srikanth, I. Hartanto, W.K. Fuchs, et al.. (1995). Rapid diagnostic fault simulation of stuck-at faults in sequential circuits using compact lists. 133–138. 48 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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