N.V. Arvind

511 total citations
10 papers, 395 citations indexed

About

N.V. Arvind is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, N.V. Arvind has authored 10 papers receiving a total of 395 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Electrical and Electronic Engineering, 5 papers in Hardware and Architecture and 1 paper in Biomedical Engineering. Recurrent topics in N.V. Arvind's work include Low-power high-performance VLSI design (7 papers), VLSI and FPGA Design Techniques (7 papers) and VLSI and Analog Circuit Testing (5 papers). N.V. Arvind is often cited by papers focused on Low-power high-performance VLSI design (7 papers), VLSI and FPGA Design Techniques (7 papers) and VLSI and Analog Circuit Testing (5 papers). N.V. Arvind collaborates with scholars based in India, United States and Germany. N.V. Arvind's co-authors include J. Saxena, Kenneth M. Butler, Vinay Jayaram, Sandip Kundu, H. S. Jamadagni, Bishnu Prasad Das, V. Visvanathan, Bharadwaj Amrutur, Karthik Rajagopal and R. Sivakumar and has published in prestigious journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems and IEEE Transactions on Semiconductor Manufacturing.

In The Last Decade

N.V. Arvind

9 papers receiving 381 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
N.V. Arvind India 6 391 350 30 22 9 10 395
G. Gronthoud Netherlands 12 447 1.1× 429 1.2× 35 1.2× 17 0.8× 11 1.2× 26 470
Alan Righter United States 11 426 1.1× 287 0.8× 19 0.6× 11 0.5× 5 0.6× 24 433
Vivek Chickermane United States 15 597 1.5× 573 1.6× 50 1.7× 12 0.5× 19 2.1× 43 623
A.K. Majhi Netherlands 10 348 0.9× 336 1.0× 10 0.3× 8 0.4× 7 0.8× 17 353
Anuja Sehgal United States 12 282 0.7× 285 0.8× 28 0.9× 11 0.5× 10 1.1× 22 306
Yuzo Takamatsu Japan 10 300 0.8× 292 0.8× 36 1.2× 13 0.6× 24 2.7× 66 324
W. Needham United States 7 355 0.9× 326 0.9× 30 1.0× 3 0.1× 10 1.1× 9 371
Teresa McLaurin United States 11 258 0.7× 275 0.8× 31 1.0× 7 0.3× 7 0.8× 24 296
Shuji Hamada Japan 8 319 0.8× 326 0.9× 31 1.0× 2 0.1× 25 2.8× 12 338
Yi-Shing Chang United States 11 341 0.9× 232 0.7× 7 0.2× 28 1.3× 5 0.6× 28 351

Countries citing papers authored by N.V. Arvind

Since Specialization
Citations

This map shows the geographic impact of N.V. Arvind's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by N.V. Arvind with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites N.V. Arvind more than expected).

Fields of papers citing papers by N.V. Arvind

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by N.V. Arvind. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by N.V. Arvind. The network helps show where N.V. Arvind may publish in the future.

Co-authorship network of co-authors of N.V. Arvind

This figure shows the co-authorship network connecting the top 25 collaborators of N.V. Arvind. A scholar is included among the top collaborators of N.V. Arvind based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with N.V. Arvind. N.V. Arvind is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

10 of 10 papers shown
1.
Arvind, N.V., et al.. (2013). Asymmetric Aging: Introduction and Solution for Power-Managed Mixed-Signal SoCs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22(3). 691–695. 3 indexed citations
2.
Das, Bishnu Prasad, Bharadwaj Amrutur, H. S. Jamadagni, N.V. Arvind, & V. Visvanathan. (2011). Voltage and Temperature-Aware SSTA Using Neural Network Delay Model. IEEE Transactions on Semiconductor Manufacturing. 24(4). 533–544. 10 indexed citations
3.
4.
Das, Bishnu Prasad, Bharadwaj Amrutur, H. S. Jamadagni, N.V. Arvind, & V. Visvanathan. (2009). Within-Die Gate Delay Variability Measurement Using Reconfigurable Ring Oscillator. IEEE Transactions on Semiconductor Manufacturing. 22(2). 256–267. 37 indexed citations
5.
Das, Bishnu Prasad, Bharadwaj Amrutur, H. S. Jamadagni, N.V. Arvind, & V. Visvanathan. (2008). Within-die gate delay variability measurement using re-configurable ring oscillator. 133–136. 22 indexed citations
6.
Das, Bishnu Prasad, et al.. (2008). Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. 685–691. 6 indexed citations
7.
Rajagopal, Karthik, et al.. (2006). A comprehensive solution for true hierarchical timing and crosstalk delay signoff. 6 pp.–6 pp.. 2 indexed citations
8.
Saxena, J., et al.. (2004). A case study of ir-drop in structured at-speed testing. 1. 1098–1104. 306 indexed citations
9.
Arvind, N.V., et al.. (2004). Path based approach for crosstalk delay analysis. 727–730. 4 indexed citations
10.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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