Brion Keller

1.4k total citations
42 papers, 1.1k citations indexed

About

Brion Keller is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, Brion Keller has authored 42 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 40 papers in Hardware and Architecture, 40 papers in Electrical and Electronic Engineering and 8 papers in Control and Systems Engineering. Recurrent topics in Brion Keller's work include VLSI and Analog Circuit Testing (40 papers), Integrated Circuits and Semiconductor Failure Analysis (36 papers) and Engineering and Test Systems (8 papers). Brion Keller is often cited by papers focused on VLSI and Analog Circuit Testing (40 papers), Integrated Circuits and Semiconductor Failure Analysis (36 papers) and Engineering and Test Systems (8 papers). Brion Keller collaborates with scholars based in United States, Netherlands and Belgium. Brion Keller's co-authors include B. Koenemann, C. Barnhart, Vivek Chickermane, T.J. Snethen, B. E. Foutz, Erik Jan Marinissen, A Ferko, David Scott, Sandeep Goel and Patrick Gallagher and has published in prestigious journals such as IBM Journal of Research and Development, IEEE Design and Test and IEEE Design & Test of Computers.

In The Last Decade

Brion Keller

38 papers receiving 1.0k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Brion Keller United States 15 1.1k 1.0k 173 32 29 42 1.1k
Kohei Miyase Japan 19 1.1k 1.0× 1.0k 1.0× 104 0.6× 23 0.7× 29 1.0× 75 1.1k
Kun-Han Tsai United States 18 1.3k 1.2× 1.2k 1.2× 202 1.2× 59 1.8× 20 0.7× 75 1.4k
I. Bayraktaroglu United States 13 681 0.6× 676 0.6× 134 0.8× 22 0.7× 32 1.1× 36 721
Jeff Rearick United States 12 594 0.6× 609 0.6× 95 0.5× 24 0.8× 27 0.9× 38 638
Seongmoon Wang United States 17 902 0.8× 907 0.9× 135 0.8× 17 0.5× 21 0.7× 38 929
Sreejit Chakravarty United States 13 507 0.5× 485 0.5× 55 0.3× 27 0.8× 19 0.7× 57 538
P. Wohl United States 15 688 0.6× 708 0.7× 112 0.6× 33 1.0× 12 0.4× 38 722
J. Saxena United States 11 903 0.8× 898 0.9× 135 0.8× 19 0.6× 10 0.3× 20 919
P. Nigh United States 17 925 0.9× 892 0.9× 87 0.5× 25 0.8× 8 0.3× 31 972
A. Krstić United States 19 877 0.8× 869 0.8× 58 0.3× 58 1.8× 31 1.1× 32 945

Countries citing papers authored by Brion Keller

Since Specialization
Citations

This map shows the geographic impact of Brion Keller's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Brion Keller with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Brion Keller more than expected).

Fields of papers citing papers by Brion Keller

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Brion Keller. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Brion Keller. The network helps show where Brion Keller may publish in the future.

Co-authorship network of co-authors of Brion Keller

This figure shows the co-authorship network connecting the top 25 collaborators of Brion Keller. A scholar is included among the top collaborators of Brion Keller based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Brion Keller. Brion Keller is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Keller, Brion, et al.. (2015). A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers. IEEE Design and Test. 32(4). 40–48. 10 indexed citations
2.
Chickermane, Vivek, et al.. (2015). At-Speed Testing of Inter-Die Connections of 3D-SICs in the Presence of Shore Logic. 79–84. 18 indexed citations
3.
Keller, Brion, B. E. Foutz, Vivek Chickermane, et al.. (2014). Efficient testing of hierarchical core-based SOCs. 1–10. 11 indexed citations
4.
5.
Deutsch, Sergej, Brion Keller, Vivek Chickermane, et al.. (2012). DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks. 1–10. 30 indexed citations
6.
7.
Keller, Brion, et al.. (2009). Main results of development and marketing survey of functional foods.. 69(1). 23–30. 1 indexed citations
8.
Kapur, Rohit, et al.. (2009). CTL and Its Usage in the EDA Industry. IEEE Design & Test of Computers. 26(1). 36–43. 1 indexed citations
9.
Keller, Brion, et al.. (2007). Using Programmable On-Product Clock Generation (OPCG) for Delay Test. 69–72. 9 indexed citations
10.
Keller, Brion, et al.. (2006). Use of MISR Output Streams for Diagnostics. 735–743. 14 indexed citations
11.
Ferguson, Steven, et al.. (2006). DFT of the Cell Processor and its Impact on EDA Test Softwar. 369–374. 6 indexed citations
12.
Keller, Brion, et al.. (2005). An economic analysis and ROI model for nanometer test. 518–524. 20 indexed citations
13.
14.
Vinnakota, B., et al.. (2002). High performance parallel fault simulation. 308–313. 2 indexed citations
15.
Barnhart, C., et al.. (2002). OPMISR: the foundation for compressed ATPG vectors. 748–757. 285 indexed citations
16.
Kapur, R., et al.. (2002). CTL the language for describing core-based test. 131–139. 30 indexed citations
17.
Barnhart, C., et al.. (2002). Extending OPMISR beyond 10× scan test efficiency. IEEE Design & Test of Computers. 19(5). 65–73. 100 indexed citations
18.
Keller, Brion, et al.. (2002). ATPG in practical and non-traditional applications. 632–640. 5 indexed citations
19.
Barlow, J. S., Po-Yao Chang, V. Iyengar, et al.. (1992). Delay Test: The Next Frontier for LSSD Test Systems. 578–578. 41 indexed citations
20.
Keller, Brion, et al.. (1991). The compiled logic simulator. IEEE Design & Test of Computers. 8(1). 21–34. 6 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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