Kai‐Shin Li

1.1k citations

36 papers · 804 indexed · h-index 13

Co-authors: Min‐Cheng Chen Wen‐Kuan Yeh Chang-Hsien Lin Jia‐Min Shieh Fu-Liang Yang Chenming Hu Yun-Fang Hou M. H. Lee
Topics: Semiconductor materials and devices (19 papers)Advanced Memory and Neural Computing (17 papers)Ferroelectric and Negative Capacitance Devices (17 papers)
Cited by: Electrical and Electronic Engineering Materials Chemistry Hardware and Architecture
Journals: ACS Nano Applied Physics Letters Journal of Applied Physics
Partner nations: Taiwan United States Philippines

In The Last Decade

Kai‐Shin Li

36 papers receiving 787 citations

Peers

Countries citing papers authored by Kai‐Shin Li

Since Specialization

Citations

This map shows the geographic impact of Kai‐Shin Li's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kai‐Shin Li with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kai‐Shin Li more than expected).

Fields of papers citing papers by Kai‐Shin Li

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kai‐Shin Li. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kai‐Shin Li. The network helps show where Kai‐Shin Li may publish in the future.

Co-authorship network of co-authors of Kai‐Shin Li

This figure shows the co-authorship network connecting the top 25 collaborators of Kai‐Shin Li. A scholar is included among the top collaborators of Kai‐Shin Li based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kai‐Shin Li. Kai‐Shin Li is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Dual-Function Unipolar Top-pSOT-MRAM for All-Spin Probabilistic Computing with Ultra-Dense Coupling and Adaptive Temporal Coding 2024 ·Chenyu Yang,(unknown),(unknown),Baofang Cai,Yi‐Ju Chen,(unknown),Kai‐Shin Li,Gengchiau Liang,Tuo‐Hung Hou	1
2	Self-powered broadband photodetection enabled by facile CVD-grown MoS₂/GaN heterostructures 2023 ·Nanoscale ·(unknown),Wen‐Hao Chang,(unknown),(unknown),Jyun‐Hong Chen,Kai‐Shin Li,Kristan Bryan Simbulan,Harshvardhan Kumar,Ching‐Yuan Su,Chieh-Hsiung Kuan,Yann‐Wen Lan	11
3	Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET 2023 ·npj 2D Materials and Applications ·(unknown),Tilo H. Yang,Chih-Hao Yang,(unknown),(unknown),Kristan Bryan Simbulan,Jyun‐Hong Chen,Chun-Jung Su,Kai‐Shin Li,Yuan‐Liang Zhong,Lain‐Jong Li,Yann‐Wen Lan	37
4	First BEOL-compatible, 10 ns-fast, and Durable 55 nm Top-pSOT-MRAM with High TMR (>130%) 2023 ·Kai‐Shin Li,Jia‐Min Shieh,Yi‐Ju Chen,(unknown),(unknown),Tuo‐Hung Hou,Chia‐Ping Lin,Chih‐Huang Lai,Denny D. Tang,J.Y.-C. Sun	10
5	Optimizing the Ferroelectric Properties of Hf_1–xZr_xO₂ Films via Crystal Orientation 2023 ·ACS Applied Electronic Materials ·(unknown),(unknown),Kai‐Shin Li,Chenming Hu,Jhih‐Min Lin,Bi‐Hsuan Lin,Mau‐Tsu Tang,Yuan‐Chieh Tseng	7
6	Dual-mode frequency multiplier in graphene-base hot electron transistor 2023 ·Nanoscale ·(unknown),Minfang Li,(unknown),Kai‐Shin Li,Jyun‐Hong Chen,Jia‐Min Shieh,Chien-Ting Wu,Kristan Bryan Simbulan,Ching‐Yuan Su,Chieh-Hsiung Kuan,Yann‐Wen Lan	4
7	Defect-engineered room temperature negative differential resistance in monolayer MoS₂ transistors 2022 ·Nanoscale Horizons ·(unknown),(unknown),Tilo H. Yang,(unknown),Kristan Bryan Simbulan,(unknown),Shang‐Hsien Hsieh,Jyun‐Hong Chen,Kai‐Shin Li,Chia‐Hao Chen,Tuo‐Hung Hou,Ting‐Hua Lu,Yann‐Wen Lan	6
8	First Demonstration of Interface-Enhanced SAF Enabling 400°C-Robust 42 nm p-SOT-MTJ Cells with STT-Assisted Field-Free Switching and Composite Channels 2021 ·Symposium on VLSI Technology ·(unknown),Kai‐Shin Li,Jia‐Min Shieh,Wei J. Chen,(unknown),Yi–Ju Chen,(unknown),(unknown),Fu-Kuo Hsueh,(unknown),(unknown),(unknown),(unknown),C. W. Liu,(unknown),Chih‐Huang Lai,Jeng−Hua Wei,Denny D. Tang,J.Y.-C. Sun	1
9	Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS₂ Channel Directly Grown on SiO$_{{x}}$ /Si Substrates Using Area-Selective CVD Technology 2019 ·IEEE Transactions on Electron Devices ·Yun-Yan Chung,Jia‐Min Shieh,Sheng‐Kai Su,(unknown),(unknown),Lain‐Jong Li,H.‐S. Philip Wong,Wen‐Bin Jian,Chao-Hsin Chien,(unknown),Chao-Ching Cheng,Ming‐Yang Li,(unknown),(unknown),Jyun‐Hong Chen,(unknown),Kai‐Shin Li	9
10	Improved Electrical Characteristics of Bulk FinFETs With SiGe Super-Lattice-Like Buried Channel 2019 ·IEEE Electron Device Letters ·Yanlin Li,Kuei‐Shu Chang‐Liao,(unknown),(unknown),(unknown),(unknown),Dun‐Bao Ruan,Yi‐Ju Chen,Kai‐Shin Li,Guang-Li Luo	18
11	First demonstration of 40-nm channel length top-gate WS₂ pFET using channel area-selective CVD growth directly on SiO_x/Si substrate 2019 ·Chao-Ching Cheng,Yun-Yan Chung,(unknown),(unknown),(unknown),Jyun‐Hong Chen,(unknown),Kai‐Shin Li,Jia‐Min Shieh,Sheng‐Kai Su,(unknown),(unknown),Lain‐Jong Li,H.‐S. Philip Wong,Chao-Hsin Chien	30
12	Analytical Modeling of Read-Induced SET-State Conductance Change in a Hafnium-Oxide Resistive Switching Device 2019 ·IEEE Transactions on Electron Devices ·(unknown),(unknown),Yu‐Jia Chen,Chih‐Chieh Wang,Kai‐Shin Li,(unknown),Tahui Wang	1
13	Ferroelectric HfZrO_x FETs on SOI Substrate With Reverse-DIBL (Drain-Induced Barrier Lowering) and NDR (Negative Differential Resistance) 2018 ·IEEE Journal of the Electron Devices Society ·Kuan‐Ting Chen,Chieh Lo,(unknown),Ming-Han Liao,Kai‐Shin Li,Shu-Tong Chang,M. H. Lee,(unknown),Zhengying Wang,C.-Y. Liao,Yu-Chen Chou,(unknown),Shih‐Yao Chen,Hongyu Chen,(unknown)	15
14	A Dual-Split-Controlled 4P2N 6T SRAM in Monolithic 3D-ICs With Enhanced Read Speed and Cell Stability for IoT Applications 2018 ·IEEE Electron Device Letters ·Wei-Hao Chen,Chien-Fu Chen,Yi‐Ju Chen,(unknown),Chang‐Hong Shen,Jia‐Min Shieh,Fu-Kuo Hsueh,Chih-Chao Yang,Bo‐Yuan Chen,Guo‐Wei Huang,Kai‐Shin Li,Wen‐Kuan Yeh,H. Yamauchi,Meng‐Fan Chang	6
15	Ultra-Low Power 3D NC-FinFET-based Monolithic 3D⁺ -IC with Computing-in-Memory for Intelligent IoT Devices 2018 ·Fu-Kuo Hsueh,Wei-Hao Chen,Kai‐Shin Li,Chang‐Hong Shen,Jia‐Min Shieh,Chun‐Ying Lee,Bo‐Yuan Chen,(unknown),Chih-Chao Yang,(unknown),Kun‐Ming Chen,Guo‐Wei Huang,(unknown),Yung-Ning Tu,Srivatsa Srinivasa,Vijaykrishnan Narayanan,Meng‐Fan Chang,Wen‐Kuan Yeh	8
16	Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition 2016 ·Haitong Li,Tony F. Wu,Abbas Rahimi,Kai‐Shin Li,(unknown),Chang-Hsien Lin,(unknown),Mohamed M. Sabry,Sukru Burc Eryilmaz,Joon Sohn,(unknown),Min‐Cheng Chen,Tsung‐Ta Wu,Jia‐Min Shieh,Wen‐Kuan Yeh,Jan M. Rabaey,Subhasish Mitra,H.‐S. Philip Wong	110
17	Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing 2016 ·Haitong Li,Kai‐Shin Li,Chang-Hsien Lin,(unknown),(unknown),Min‐Cheng Chen,Tsung‐Ta Wu,Joon Sohn,Sukru Burc Eryilmaz,Jia‐Min Shieh,Wen‐Kuan Yeh,H.‐S. Philip Wong	58
18	Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics 2015 ·Meng‐Fan Chang,Albert Lee,Chien-Chen Lin,Mon‐Shu Ho,(unknown),Chia-Chen Kuo,(unknown),(unknown),Tzu-Kun Ku,Chien-Fu Chen,Kai‐Shin Li,Jia‐Min Shieh	10
19	Study of sub-5 nm RRAM, tunneling selector and selector less device 2015 ·Kai‐Shin Li,(unknown),Min‐Cheng Chen,(unknown),Jian-Ming Lü,Chia‐Hua Lin,(unknown),(unknown),Yun-Fang Hou,Chun‐Hao Lin,(unknown),(unknown),(unknown),(unknown),Chonggang Wu,Fu-Liang Yang,W.-K. Yeh	11
20	Utilizing Sub-5 nm sidewall electrode technology for atomic-scale resistive memory fabrication 2014 ·Kai‐Shin Li,ChiaHua Ho,(unknown),Min‐Cheng Chen,(unknown),Jian-Ming Lü,Chia‐Hua Lin,(unknown),(unknown),Yun-Fang Hou,Chun‐Hao Lin,(unknown),(unknown),(unknown),(unknown),Chonggang Wu,Fu-Liang Yang	34

About Kai‐Shin Li

Kai‐Shin Li is a scholar working on Electrical and Electronic Engineering, Materials Chemistry and Condensed Matter Physics, having authored 36 papers that have together received 804 indexed citations. Recurring topics across this work include Semiconductor materials and devices (19 papers), Advanced Memory and Neural Computing (17 papers) and Ferroelectric and Negative Capacitance Devices (17 papers). The work is most often cited by research in Electrical and Electronic Engineering (739 citations), Materials Chemistry (302 citations) and Hardware and Architecture (24 citations). Kai‐Shin Li has collaborated with scholars based in Taiwan, United States and Philippines. Frequent co-authors include Min‐Cheng Chen, Wen‐Kuan Yeh, Chang-Hsien Lin, Jia‐Min Shieh, Fu-Liang Yang, Chenming Hu, Yun-Fang Hou, M. H. Lee, Chun‐Chi Chen and Ming-Han Liao. Their work appears in journals such as ACS Nano, Applied Physics Letters and Journal of Applied Physics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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