J. Rajski

2.8k total citations
68 papers, 2.0k citations indexed

About

J. Rajski is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, J. Rajski has authored 68 papers receiving a total of 2.0k indexed citations (citations by other indexed papers that have themselves been cited), including 66 papers in Hardware and Architecture, 66 papers in Electrical and Electronic Engineering and 16 papers in Control and Systems Engineering. Recurrent topics in J. Rajski's work include VLSI and Analog Circuit Testing (66 papers), Integrated Circuits and Semiconductor Failure Analysis (63 papers) and Engineering and Test Systems (16 papers). J. Rajski is often cited by papers focused on VLSI and Analog Circuit Testing (66 papers), Integrated Circuits and Semiconductor Failure Analysis (63 papers) and Engineering and Test Systems (16 papers). J. Rajski collaborates with scholars based in United States, Hungary and Poland. J. Rajski's co-authors include Jerzy Tyszer, N. Tamarapalli, Kun-Han Tsai, Mark Kassab, Grzegorz Mrugalski, Xijiang Lin, Nilanjan Mukherjee, A.S.M. Hassan, Malgorzata Marek-Sadowska and G. Hetherington and has published in prestigious journals such as Computer, IEEE Transactions on Computers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

J. Rajski

67 papers receiving 1.9k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
J. Rajski United States	24	1.9k	1.9k	284	88	59	68	2.0k
T.W. Williams United States	23	2.0k 1.0×	1.9k 1.0×	306 1.1×	107 1.2×	89 1.5×	62	2.1k
Kenneth M. Butler United States	20	1.6k 0.8×	1.6k 0.8×	222 0.8×	89 1.0×	24 0.4×	61	1.8k
J. Savir United States	19	1.4k 0.7×	1.4k 0.7×	223 0.8×	63 0.7×	20 0.3×	73	1.5k
E.M. Rudnick United States	22	1.1k 0.6×	1.1k 0.6×	127 0.4×	170 1.9×	43 0.7×	67	1.3k
Kuen-Jong Lee Taiwan	20	1.2k 0.6×	1.2k 0.6×	189 0.7×	38 0.4×	97 1.6×	140	1.3k
Raimund Ubar Estonia	14	903 0.5×	841 0.4×	128 0.5×	136 1.5×	171 2.9×	224	1.1k
Wu-Tung Cheng United States	29	2.7k 1.4×	2.8k 1.5×	232 0.8×	119 1.4×	123 2.1×	182	3.0k
Abhijit Jas United States	16	1.2k 0.6×	1.2k 0.6×	235 0.8×	65 0.7×	95 1.6×	34	1.3k
Haralampos‐G. Stratigopoulos France	16	617 0.3×	735 0.4×	102 0.4×	22 0.3×	31 0.5×	72	886
Stephen Y. H. Su United States	13	703 0.4×	689 0.4×	81 0.3×	66 0.8×	130 2.2×	30	977

Countries citing papers authored by J. Rajski

Since Specialization

Citations

This map shows the geographic impact of J. Rajski's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Rajski with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Rajski more than expected).

Fields of papers citing papers by J. Rajski

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Rajski. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Rajski. The network helps show where J. Rajski may publish in the future.

Co-authorship network of co-authors of J. Rajski

This figure shows the co-authorship network connecting the top 25 collaborators of J. Rajski. A scholar is included among the top collaborators of J. Rajski based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Rajski. J. Rajski is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Mukherjee, Nilanjan, et al.. (2024). Delay Monitoring Under Different PVT Corners for Test and Functional Operation. 157–166.

Benware, Brady, et al.. (2011). Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs. Journal of Electronic Testing. 27(5). 599–609. 6 indexed citations

Lin, Xijiang & J. Rajski. (2010). Adaptive Low Shift Power Test Pattern Generator for Logic BIST. 355–360. 26 indexed citations

Mukherjee, Nilanjan, et al.. (2010). Ring Generator: An Ultimate Linear Feedback Shift Register. Computer. 44(6). 64–71. 10 indexed citations

Rajski, J., et al.. (2009). A scalable method for the generation of small test sets. Design, Automation, and Test in Europe. 1136–1141. 8 indexed citations

Mukherjee, Nilanjan, et al.. (2009). High-Speed On-Chip Event Counters for Embedded Systems. 275–280. 6 indexed citations

Marek-Sadowska, Malgorzata, et al.. (2009). Timing-Aware Multiple-Delay-Fault Diagnosis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 28(2). 245–258. 22 indexed citations

Mukherjee, Nilanjan, et al.. (2008). High Throughput Diagnosis via Compression of Failure Data in Embedded Memory BIST. 19. 1–10. 4 indexed citations

Reddy, S.M., et al.. (2007). Enhancing delay fault coverage through low-power segmented scan. IET Computers & Digital Techniques. 1(3). 220–229. 4 indexed citations

10.

Lin, Xijiang, Mark Kassab, & J. Rajski. (2007). Test Generation for Timing-Critical Transition Faults. 493–500. 18 indexed citations

11.

Lin, Xijiang, Kun-Han Tsai, Chen Wang, et al.. (2006). Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects. 139–146. 108 indexed citations

12.

Hellebrand, Sybille, Steffen Tarnick, J. Rajski, & B. Courtois. (2005). GENERATION OF VECTOR PATTTERNS THROUGH RESEEDING OF MUETIPLE-POLYNOMIAL LINEAR FEEDBACK SHIFT REGIST. 120–120. 47 indexed citations

13.

Tamarapalli, N., et al.. (2004). Industrial experience with adoption of edt for low-cost test without concessions. 1. 1211–1220. 15 indexed citations

14.

Rajski, J., Jerzy Tyszer, Mark Kassab, et al.. (2003). Embedded deterministic test for low cost manufacturing test. 301–310. 321 indexed citations

15.

Mrugalski, Grzegorz, Jerzy Tyszer, & J. Rajski. (2003). 2D test sequence generators. IEEE Design & Test of Computers. 20(1). 51–59. 1 indexed citations

16.

Wang, Chen, S.M. Reddy, Irith Pomeranz, Xijiang Lin, & J. Rajski. (2002). Conflict driven techniques for improving deterministic test pattern generation. Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 87–93. 16 indexed citations

17.

Bai, Xiaoliang, Sujit Dey, & J. Rajski. (2000). Self-test methodology for at-speed test of crosstalk in chip interconnects. 619–624. 56 indexed citations

18.

Radecka, Katarzyna, et al.. (1997). Arithmetic built-in self-test for DSP cores. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 16(11). 1358–1369. 40 indexed citations

19.

Rajski, J. & Jerzy Tyszer. (1996). On linear dependencies in subspaces of LFSR-generated sequences. IEEE Transactions on Computers. 45(10). 1212–1216. 14 indexed citations

20.

Adham, Saman, Mark Kassab, J. Rajski, & Jerzy Tyszer. (1995). Built-in self test of digital decimators. IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing. 42(7). 486–492. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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