J. Rajski

2.8k citations

68 papers · 2.0k indexed · h-index 24

Hardware and Architecture top 0.2%
Electrical and Electronic Engineering top 2%
Control and Systems Engineering top 5%
Software top 5%
Computer Networks and Communications

Co-authors: Jerzy Tyszer N. Tamarapalli Kun-Han Tsai Mark Kassab Grzegorz Mrugalski Xijiang Lin Nilanjan Mukherjee A.S.M. Hassan
Topics: VLSI and Analog Circuit Testing (66 papers)Integrated Circuits and Semiconductor Failure Analysis (63 papers)Engineering and Test Systems (16 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Software
Journals: Computer IEEE Transactions on Computers IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Partner nations: United States Hungary Poland

In The Last Decade

J. Rajski

67 papers receiving 1.9k citations

Peers

Countries citing papers authored by J. Rajski

Since Specialization

Citations

This map shows the geographic impact of J. Rajski's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Rajski with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Rajski more than expected).

Fields of papers citing papers by J. Rajski

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Rajski. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Rajski. The network helps show where J. Rajski may publish in the future.

Co-authorship network of co-authors of J. Rajski

This figure shows the co-authorship network connecting the top 25 collaborators of J. Rajski. A scholar is included among the top collaborators of J. Rajski based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Rajski. J. Rajski is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Delay Monitoring Under Different PVT Corners for Test and Functional Operation 2024 ·(unknown),(unknown),Nilanjan Mukherjee,Irith Pomeranz,J. Rajski	0
2	Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs 2011 ·Journal of Electronic Testing ·Brady Benware,Grzegorz Mrugalski,(unknown),J. Rajski,(unknown),Jerzy Tyszer	6
3	Adaptive Low Shift Power Test Pattern Generator for Logic BIST 2010 ·Xijiang Lin,J. Rajski	26
4	Ring Generator: An Ultimate Linear Feedback Shift Register 2010 ·Computer ·Nilanjan Mukherjee,J. Rajski,Grzegorz Mrugalski,(unknown),Jerzy Tyszer	10
5	A scalable method for the generation of small test sets 2009 ·Design, Automation, and Test in Europe ·(unknown),J. Rajski,S.M. Reddy,Irith Pomeranz	8
6	High-Speed On-Chip Event Counters for Embedded Systems 2009 ·Nilanjan Mukherjee,(unknown),J. Rajski,Jerzy Tyszer	6
7	Timing-Aware Multiple-Delay-Fault Diagnosis 2009 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown),Malgorzata Marek-Sadowska,Kun-Han Tsai,J. Rajski	22
8	High Throughput Diagnosis via Compression of Failure Data in Embedded Memory BIST 2008 ·Nilanjan Mukherjee,(unknown),J. Rajski,Jerzy Tyszer	4
9	Enhancing delay fault coverage through low-power segmented scan 2007 ·IET Computers & Digital Techniques ·(unknown),S.M. Reddy,Irith Pomeranz,J. Rajski,B.M. Al-Hashimi	4
10	Test Generation for Timing-Critical Transition Faults 2007 ·Xijiang Lin,Mark Kassab,J. Rajski	18
11	Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects 2006 ·Xijiang Lin,Kun-Han Tsai,Chen Wang,Mark Kassab,J. Rajski,Takeo Kobayashi,(unknown),Yasuo Satô,Shuji Hamada,(unknown)	108
12	GENERATION OF VECTOR PATTTERNS THROUGH RESEEDING OF MUETIPLE-POLYNOMIAL LINEAR FEEDBACK SHIFT REGIST 2005 ·Sybille Hellebrand,Steffen Tarnick,J. Rajski,B. Courtois	47
13	Industrial experience with adoption of edt for low-cost test without concessions 2004 ·(unknown),(unknown),N. Tamarapalli,Mark Kassab,(unknown),(unknown),Nilanjan Mukherjee,J. Rajski	15
14	Embedded deterministic test for low cost manufacturing test 2003 ·J. Rajski,Jerzy Tyszer,Mark Kassab,Nilanjan Mukherjee,Robert G. Thompson,Kun-Han Tsai,Andre Hertwig,N. Tamarapalli,Grzegorz Mrugalski,Geir Egil Eide,Jun Qian	321
15	2D test sequence generators 2003 ·IEEE Design & Test of Computers ·Grzegorz Mrugalski,Jerzy Tyszer,J. Rajski	1
16	Conflict driven techniques for improving deterministic test pattern generation 2002 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Chen Wang,S.M. Reddy,Irith Pomeranz,Xijiang Lin,J. Rajski	16
17	Self-test methodology for at-speed test of crosstalk in chip interconnects 2000 ·Xiaoliang Bai,Sujit Dey,J. Rajski	56
18	Arithmetic built-in self-test for DSP cores 1997 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Katarzyna Radecka,J. Rajski,(unknown)	40
19	On linear dependencies in subspaces of LFSR-generated sequences 1996 ·IEEE Transactions on Computers ·J. Rajski,Jerzy Tyszer	14
20	Built-in self test of digital decimators 1995 ·IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ·Saman Adham,Mark Kassab,J. Rajski,Jerzy Tyszer	1

About J. Rajski

J. Rajski is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering, having authored 68 papers that have together received 2.0k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (66 papers), Integrated Circuits and Semiconductor Failure Analysis (63 papers) and Engineering and Test Systems (16 papers). The work is most often cited by research in Hardware and Architecture (1.9k citations), Electrical and Electronic Engineering (1.9k citations) and Software (88 citations). J. Rajski has collaborated with scholars based in United States, Hungary and Poland. Frequent co-authors include Jerzy Tyszer, N. Tamarapalli, Kun-Han Tsai, Mark Kassab, Grzegorz Mrugalski, Xijiang Lin, Nilanjan Mukherjee, A.S.M. Hassan, Malgorzata Marek-Sadowska and G. Hetherington. Their work appears in journals such as Computer, IEEE Transactions on Computers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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