Mark Kassab

2.1k total citations · 1 hit paper
49 papers, 1.6k citations indexed

About

Mark Kassab is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Control and Systems Engineering. According to data from OpenAlex, Mark Kassab has authored 49 papers receiving a total of 1.6k indexed citations (citations by other indexed papers that have themselves been cited), including 49 papers in Electrical and Electronic Engineering, 48 papers in Hardware and Architecture and 12 papers in Control and Systems Engineering. Recurrent topics in Mark Kassab's work include VLSI and Analog Circuit Testing (48 papers), Integrated Circuits and Semiconductor Failure Analysis (46 papers) and VLSI and FPGA Design Techniques (16 papers). Mark Kassab is often cited by papers focused on VLSI and Analog Circuit Testing (48 papers), Integrated Circuits and Semiconductor Failure Analysis (46 papers) and VLSI and FPGA Design Techniques (16 papers). Mark Kassab collaborates with scholars based in United States, Hungary and Poland. Mark Kassab's co-authors include Jerzy Tyszer, Janusz Rajski, Nilanjan Mukherjee, J. Rajski, N. Tamarapalli, Grzegorz Mrugalski, Kun-Han Tsai, Xijiang Lin, Jun Qian and A.S.M. Hassan and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing.

In The Last Decade

Mark Kassab

45 papers receiving 1.5k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Embedded Deterministic Test

2004 387 citations Janusz Rajski, Jerzy Tyszer et al. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Mark Kassab United States	16	1.6k	1.5k	242	49	43	49	1.6k
J.A. Waicukauski United States	23	1.9k 1.2×	1.8k 1.2×	280 1.2×	72 1.5×	32 0.7×	52	1.9k
C. Landrault France	21	1.4k 0.9×	1.4k 0.9×	185 0.8×	57 1.2×	34 0.8×	101	1.5k
R. Kapur United States	18	838 0.5×	834 0.5×	161 0.7×	52 1.1×	41 1.0×	40	923
N. Tamarapalli United States	14	1.2k 0.8×	1.2k 0.8×	192 0.8×	45 0.9×	28 0.7×	17	1.3k
B. Koenemann United States	9	1.5k 0.9×	1.4k 0.9×	258 1.1×	39 0.8×	59 1.4×	15	1.5k
J. Savir United States	19	1.4k 0.9×	1.4k 0.9×	223 0.9×	63 1.3×	20 0.5×	73	1.5k
Grzegorz Mrugalski United States	17	1.1k 0.7×	1.1k 0.7×	191 0.8×	20 0.4×	19 0.4×	66	1.2k
S. Venkataraman United States	12	702 0.5×	690 0.5×	107 0.4×	45 0.9×	22 0.5×	27	745
H.-J. Wunderlich Germany	16	943 0.6×	900 0.6×	149 0.6×	43 0.9×	35 0.8×	47	990
Sybille Hellebrand Germany	19	1.3k 0.9×	1.3k 0.9×	206 0.9×	41 0.8×	177 4.1×	81	1.5k

Countries citing papers authored by Mark Kassab

Since Specialization

Citations

This map shows the geographic impact of Mark Kassab's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Mark Kassab with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Mark Kassab more than expected).

Fields of papers citing papers by Mark Kassab

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Mark Kassab. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Mark Kassab. The network helps show where Mark Kassab may publish in the future.

Co-authorship network of co-authors of Mark Kassab

This figure shows the co-authorship network connecting the top 25 collaborators of Mark Kassab. A scholar is included among the top collaborators of Mark Kassab based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Mark Kassab. Mark Kassab is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

1.

Mittal, Suneet, et al.. (2024). Solving Complex Electrical Fault Isolation Challenges with Innovative DFT Strategies. Proceedings - International Symposium for Testing and Failure Analysis. 84918. 125–134.

2.

Lee, Kuen-Jong, et al.. (2021). Efficient Test Compression Configuration Selection. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41(7). 2323–2336. 5 indexed citations

3.

Huang, Yu, et al.. (2020). Effective Design of Layout-Friendly EDT Decompressor. 1–6. 1 indexed citations

4.

Kassab, Mark, et al.. (2020). Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs. 1–10. 22 indexed citations

5.

Lin, Xijiang, Mark Kassab, & Janusz Rajski. (2014). Using dynamic shift to reduce test data volume in high-compression designs. 52. 1–6. 5 indexed citations

6.

Sharma, Manish, Avijit Dutta, Wu-Tung Cheng, Brady Benware, & Mark Kassab. (2011). A novel Test Access Mechanism for failure diagnosis of multiple isolated identical cores. 1–9. 20 indexed citations

7.

Lin, Xijiang, et al.. (2010). Clock control architecture and ATPG for reducing pattern count in SoC designs with multiple clock domains. 1–10. 4 indexed citations

8.

Czysz, Dariusz, Mark Kassab, Xijiang Lin, et al.. (2009). Low-Power Scan Operation in Test Compression Environment. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 28(11). 1742–1755. 46 indexed citations

9.

Czysz, Dariusz, Mark Kassab, Xijiang Lin, et al.. (2008). Low Power Scan Shift and Capture in the EDT Environment. 25. 1–10. 46 indexed citations

10.

Lin, Xijiang, Mark Kassab, & J. Rajski. (2007). Test Generation for Timing-Critical Transition Faults. 493–500. 18 indexed citations

11.

Tsai, Kun-Han, et al.. (2007). Test Generation in the Presence of Timing Exceptions and Constraints. Proceedings - ACM IEEE Design Automation Conference. 688–693. 2 indexed citations

12.

Tyszer, Jerzy, et al.. (2007). X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. IEEE Design & Test of Computers. 24(5). 476–485. 7 indexed citations

13.

Lin, Xijiang, Kun-Han Tsai, Chen Wang, et al.. (2006). Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects. 139–146. 108 indexed citations

14.

Tamarapalli, N., et al.. (2004). Industrial experience with adoption of edt for low-cost test without concessions. 1. 1211–1220. 15 indexed citations

15.

Rajski, Janusz, Jerzy Tyszer, Mark Kassab, & Nilanjan Mukherjee. (2004). Embedded Deterministic Test. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23(5). 776–792. 387 indexed citations breakdown →

16.

Rajski, J., Jerzy Tyszer, Mark Kassab, et al.. (2003). Embedded deterministic test for low cost manufacturing test. 301–310. 321 indexed citations

17.

Rajski, Janusz, Mark Kassab, Nilanjan Mukherjee, et al.. (2003). Embedded deterministic test for low-cost manufacturing. IEEE Design & Test of Computers. 20(5). 58–66. 51 indexed citations

18.

Adham, Saman, Mark Kassab, Nilanjan Mukherjee, et al.. (2002). Arithmetic built-in self-test for digital signal processing architectures. 2. 659–662. 7 indexed citations

19.

Kassab, Mark, et al.. (1998). Propagation of last-transition-time constraints in gate-level timing analysis. Design, Automation, and Test in Europe. 796–802. 1 indexed citations

20.

Adham, Saman, Mark Kassab, J. Rajski, & Jerzy Tyszer. (1995). Built-in self test of digital decimators. IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing. 42(7). 486–492. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact