T.W. Williams

3.0k total citations · 1 hit paper
62 papers, 2.1k citations indexed

About

T.W. Williams is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, T.W. Williams has authored 62 papers receiving a total of 2.1k indexed citations (citations by other indexed papers that have themselves been cited), including 54 papers in Hardware and Architecture, 50 papers in Electrical and Electronic Engineering and 15 papers in Control and Systems Engineering. Recurrent topics in T.W. Williams's work include VLSI and Analog Circuit Testing (54 papers), Integrated Circuits and Semiconductor Failure Analysis (41 papers) and Engineering and Test Systems (15 papers). T.W. Williams is often cited by papers focused on VLSI and Analog Circuit Testing (54 papers), Integrated Circuits and Semiconductor Failure Analysis (41 papers) and Engineering and Test Systems (15 papers). T.W. Williams collaborates with scholars based in United States, Switzerland and Germany. T.W. Williams's co-authors include E. B. Eichelberger, Kenneth P. Parker, R. Kapur, M.R. Mercer, Wilfried Daehn, P. Wohl, J.A. Waicukauski, K.D. Wagner, Emil Gizdarski and Samitha Samaranayake and has published in prestigious journals such as Proceedings of the IEEE, IEEE Transactions on Industrial Electronics and Computer.

In The Last Decade

T.W. Williams

57 papers receiving 1.9k citations

Hit Papers

A logic design structure for LSI testability 1977 2026 1993 2009 1977 200 400 600
What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

  1. A logic design structure for LSI testability
    1977 645 citations E. B. Eichelberger, T.W. Williams Design Automation Conference profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
T.W. Williams United States 23 2.0k 1.9k 306 107 89 62 2.1k
J. Rajski United States 24 1.9k 1.0× 1.9k 1.0× 284 0.9× 88 0.8× 59 0.7× 68 2.0k
E. B. Eichelberger United States 12 1.3k 0.6× 1.2k 0.6× 221 0.7× 84 0.8× 70 0.8× 19 1.4k
Colin Maunder United Kingdom 7 1.2k 0.6× 1.1k 0.6× 260 0.8× 51 0.5× 77 0.9× 17 1.3k
E.M. Rudnick United States 22 1.1k 0.6× 1.1k 0.6× 127 0.4× 170 1.6× 43 0.5× 67 1.3k
J. P. Roth United States 14 1.2k 0.6× 1.1k 0.6× 169 0.6× 212 2.0× 59 0.7× 26 1.5k
Kenneth M. Butler United States 20 1.6k 0.8× 1.6k 0.9× 222 0.7× 89 0.8× 24 0.3× 61 1.8k
Raimund Ubar Estonia 14 903 0.5× 841 0.4× 128 0.4× 136 1.3× 171 1.9× 224 1.1k
Stephen Y. H. Su United States 13 703 0.4× 689 0.4× 81 0.3× 66 0.6× 130 1.5× 30 977
N.R. Saxena United States 18 636 0.3× 701 0.4× 42 0.1× 108 1.0× 295 3.3× 50 925
Pierre Paulin Canada 19 2.0k 1.0× 874 0.5× 70 0.2× 51 0.5× 1.1k 12.8× 64 2.3k

Countries citing papers authored by T.W. Williams

Since Specialization
Citations

This map shows the geographic impact of T.W. Williams's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T.W. Williams with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T.W. Williams more than expected).

Fields of papers citing papers by T.W. Williams

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T.W. Williams. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T.W. Williams. The network helps show where T.W. Williams may publish in the future.

Co-authorship network of co-authors of T.W. Williams

This figure shows the co-authorship network connecting the top 25 collaborators of T.W. Williams. A scholar is included among the top collaborators of T.W. Williams based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T.W. Williams. T.W. Williams is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
2.
Wohl, P., et al.. (2006). Efficient compression of deterministic patterns into multiple prpg seeds. 916–925. 46 indexed citations
3.
Wagner, K.D. & T.W. Williams. (2005). ENHANCING BOARD FUNCTIONAL SELF-TEST BY CONCURRENT SAMPLING. c 29. 633–633.
4.
Williams, T.W., et al.. (2005). Delay Testing Quality in Timing-Optimized Designs. 897–897. 11 indexed citations
5.
Oh, Nahmsuk, et al.. (2003). Test Pattern Compression Using Prelude Vectors in Fan-Out Scan Chain with Feedback Architecture. Design, Automation, and Test in Europe. 2. 10110–10115. 11 indexed citations
6.
Samaranayake, Samitha, et al.. (2003). A reconfigurable shared scan-in architecture. 9–14. 67 indexed citations
7.
Corsi, F., Sergio Di Martino, & T.W. Williams. (2002). Defect level as a function of fault coverage and yield. 507–508. 10 indexed citations
8.
Wang, Li-C., et al.. (2002). On the decline of testing efficiency as fault coverage approaches 100%. 74–83. 30 indexed citations
9.
Williams, T.W. & Stephen Sunter. (2000). How Should Fault Coverage Be Defined. 325–328. 1 indexed citations
10.
Kapur, R., et al.. (2000). The mutating metric for benchmarking test. IEEE Design & Test of Computers. 17(3). 18–21.
11.
Williams, T.W., et al.. (2000). DFT closure. 8. 3 indexed citations
12.
Kapur, R. & T.W. Williams. (1999). Tough challenges as design and test go nanometer. Computer. 32(11). 42–45. 11 indexed citations
13.
Sousa, José T. de, F.M. Gonçalves, J.P. Teixeira, et al.. (1996). Defect level evaluation in an IC design environment. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 15(10). 1286–1293. 35 indexed citations
14.
Kapur, R., S. Patil, T.J. Snethen, & T.W. Williams. (1996). A weighted random pattern test generation system. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 15(8). 1020–1025. 30 indexed citations
15.
Barlow, J. S., Po-Yao Chang, V. Iyengar, et al.. (1992). Delay Test: The Next Frontier for LSSD Test Systems. 578–578. 41 indexed citations
16.
Williams, T.W., et al.. (1991). The interdependence between delay-optimization of synthesized networks and testing. 87–92. 59 indexed citations
17.
Williams, T.W., et al.. (1984). Chip Partitioning Aid: A Design Technique for Partitionability and Testability in VLSI. 203–208. 5 indexed citations
18.
Williams, T.W. & Kenneth P. Parker. (1983). Design for testability—A survey. Proceedings of the IEEE. 71(1). 98–112. 267 indexed citations
19.
Williams, T.W.. (1982). Design for Testability. Design Automation Conference. 9–9. 7 indexed citations
20.
Eichelberger, E. B. & T.W. Williams. (1977). A logic design structure for LSI testability. Design Automation Conference. 358–364. 645 indexed citations breakdown →

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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