Irith Pomeranz

10.9k total citations
650 papers, 8.0k citations indexed

About

Irith Pomeranz is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, Irith Pomeranz has authored 650 papers receiving a total of 8.0k indexed citations (citations by other indexed papers that have themselves been cited), including 634 papers in Hardware and Architecture, 629 papers in Electrical and Electronic Engineering and 65 papers in Control and Systems Engineering. Recurrent topics in Irith Pomeranz's work include VLSI and Analog Circuit Testing (631 papers), Integrated Circuits and Semiconductor Failure Analysis (554 papers) and Radiation Effects in Electronics (212 papers). Irith Pomeranz is often cited by papers focused on VLSI and Analog Circuit Testing (631 papers), Integrated Circuits and Semiconductor Failure Analysis (554 papers) and Radiation Effects in Electronics (212 papers). Irith Pomeranz collaborates with scholars based in United States, Japan and Germany. Irith Pomeranz's co-authors include S.M. Reddy, Seiji Kajihara, Lakshmi Reddy, T.N. Vijaykumar, Karl Cheng, T. N. Vijaykumar, K. Kinoshita, Xijiang Lin, Janusz Rajski and S. Chakravarty and has published in prestigious journals such as IEEE Access, IEEE Transactions on Computers and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Irith Pomeranz

583 papers receiving 7.7k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Irith Pomeranz United States 42 7.6k 7.6k 859 685 511 650 8.0k
S.M. Reddy United States 48 9.7k 1.3× 9.6k 1.3× 1.0k 1.2× 661 1.0× 692 1.4× 598 10.6k
M. Abramovici United States 32 4.2k 0.6× 3.9k 0.5× 328 0.4× 350 0.5× 241 0.5× 88 4.6k
Janusz Rajski United States 37 4.6k 0.6× 4.5k 0.6× 682 0.8× 202 0.3× 121 0.2× 214 4.8k
Y. Zorian United States 35 4.1k 0.5× 4.3k 0.6× 495 0.6× 179 0.3× 564 1.1× 222 4.9k
Melvin A. Breuer United States 22 3.1k 0.4× 3.1k 0.4× 337 0.4× 307 0.4× 339 0.7× 91 3.8k
Hans-Joachim Wunderlich Germany 30 3.4k 0.4× 3.3k 0.4× 445 0.5× 152 0.2× 277 0.5× 249 3.6k
Kewal K. Saluja United States 34 3.1k 0.4× 3.4k 0.5× 419 0.5× 155 0.2× 1.1k 2.1× 232 4.2k
Nur A. Touba United States 40 4.7k 0.6× 4.8k 0.6× 712 0.8× 130 0.2× 444 0.9× 164 5.2k
Dimitris Gizopoulos Greece 30 2.3k 0.3× 2.5k 0.3× 217 0.3× 383 0.6× 581 1.1× 186 3.0k
Jerzy Tyszer United States 30 3.0k 0.4× 2.9k 0.4× 524 0.6× 113 0.2× 105 0.2× 157 3.2k

Countries citing papers authored by Irith Pomeranz

Since Specialization
Citations

This map shows the geographic impact of Irith Pomeranz's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Irith Pomeranz with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Irith Pomeranz more than expected).

Fields of papers citing papers by Irith Pomeranz

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Irith Pomeranz. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Irith Pomeranz. The network helps show where Irith Pomeranz may publish in the future.

Co-authorship network of co-authors of Irith Pomeranz

This figure shows the co-authorship network connecting the top 25 collaborators of Irith Pomeranz. A scholar is included among the top collaborators of Irith Pomeranz based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Irith Pomeranz. Irith Pomeranz is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Pomeranz, Irith & Y. Zorian. (2024). Functionally Possible Path Delay Faults With High Functional Switching Activity. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 32(11). 2159–2163. 3 indexed citations
2.
Pomeranz, Irith. (2020). Non-Masking Non-Robust Tests for Path Delay Faults. 1–6.
3.
Pomeranz, Irith & S.M. Reddy. (2010). Functional and partially-functional skewed-load tests. Asia and South Pacific Design Automation Conference. 505–510. 2 indexed citations
4.
Pomeranz, Irith & S.M. Reddy. (2010). Reducing the storage requirements of a test sequence by using a background vector. Design, Automation, and Test in Europe. 1237–1242. 1 indexed citations
5.
Rajski, J., et al.. (2009). A scalable method for the generation of small test sets. Design, Automation, and Test in Europe. 1136–1141. 8 indexed citations
6.
Kajihara, Seiji, et al.. (2004). Don't Care Identification and Statistical Encoding for Test Data Compression. IEICE Transactions on Information and Systems. 87(3). 544–550. 1 indexed citations
7.
Li, Wei, et al.. (2003). An Improved Markov Source Design for Scan BIST. 106–110. 4 indexed citations
8.
Pomeranz, Irith & S.M. Reddy. (2003). A New Approach to Test Generation and Test Compaction for Scan Circuits. Design, Automation, and Test in Europe. 11000–11005. 14 indexed citations
9.
Pomeranz, Irith, S.M. Reddy, & Sandip Kundu. (2003). On the Characterization of Hard-to-Detect Bridging Faults. Design, Automation, and Test in Europe. 11012–11019. 7 indexed citations
10.
Pomeranz, Irith & S.M. Reddy. (2003). On Application of Output Masking to Undetectable Faults in Synchronous Sequential Circuits with Design-for-Testability Logic. International Conference on Computer Aided Design. 867–872. 8 indexed citations
11.
Pomeranz, Irith & S.M. Reddy. (2002). A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits. Asia and South Pacific Design Automation Conference. 677–682. 2 indexed citations
12.
Pomeranz, Irith & S.M. Reddy. (2002). Test Enrichment for Path Delay Faults Using Multiple Sets of Target Faults. Design, Automation, and Test in Europe. 722–729. 7 indexed citations
13.
Pomeranz, Irith & S.M. Reddy. (2001). Definitions of the numbers of detections of target faults and their effectiveness in guiding test generation for high defect coverage. Design, Automation, and Test in Europe. 504–508. 19 indexed citations
14.
Pomeranz, Irith & S.M. Reddy. (2001). Sequence reordering to improve the levels of compaction achievable by static compaction procedures. Design, Automation, and Test in Europe. 214–218. 4 indexed citations
15.
Pomeranz, Irith & S.M. Reddy. (1997). Built-in test generation for synchronous sequential circuits. International Conference on Computer Aided Design. 421–426. 20 indexed citations
16.
Pomeranz, Irith & S.M. Reddy. (1994). On testing delay faults in macro-based combinational circuits. International Conference on Computer Aided Design. 332–339. 24 indexed citations
17.
Pomeranz, Irith & S.M. Reddy. (1994). On error correction in macro-based circuits. International Conference on Computer Aided Design. 1994. 568–575. 19 indexed citations
18.
Reddy, Lakshmi, Irith Pomeranz, & S.M. Reddy. (1992). COMPACTEST-II: a method to generate compact two-pattern test sets for combinational logic circuits. International Conference on Computer Aided Design. 568–574. 10 indexed citations
19.
Pomeranz, Irith & S.M. Reddy. (1992). On the generation of small dictionaries for fault location. International Conference on Computer Aided Design. 272–279. 11 indexed citations
20.
Pomeranz, Irith, Lakshmi Reddy, & S.M. Reddy. (1992). SPADES: a simulator for path delay faults in sequential circuits. European Design Automation Conference. 428–435. 32 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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