J. DeBrosse

1.0k citations

22 papers · 602 indexed · h-index 11

Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing 3
Atomic and Molecular Physics, and Optics top 10%
- Magnetic properties of thin films 9
Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices 11
- Advancements in Semiconductor Devices and Circuit Design 7
- Low-power high-performance VLSI design 5
- Integrated Circuits and Semiconductor Failure Analysis 3
- Advanced Memory and Neural Computing 3
Computer Networks and Communications top 10%
- Advanced Data Storage Technologies 5
Electronic, Optical and Magnetic Materials

Co-authors: R.H. Dennard J. MandelmanY. LiR. Divakaruni G. Bronner C. Radens W. J. Gallagher T. Maffitt
Cited by: Hardware and Architecture Atomic and Molecular Physics, and Optics Electrical and Electronic Engineering
Journals: IEEE Journal of Solid-State Circuits (7 papers)IBM Journal of Research and Development (3 papers)IEEE Transactions on Magnetics (1 paper)
Partner nations: United States Japan France

In The Last Decade

J. DeBrosse

21 papers receiving 560 citations

Peers

Countries citing papers authored by J. DeBrosse

Since Specialization

Citations

This map shows the geographic impact of J. DeBrosse's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. DeBrosse with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. DeBrosse more than expected).

Fields of papers citing papers by J. DeBrosse

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. DeBrosse. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. DeBrosse. The network helps show where J. DeBrosse may publish in the future.

Co-authorship network

The 25 scholars most cited alongside J. DeBrosse, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with J. DeBrosse Line = papers co-authored together J. DeBrosse links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	A fully-functional 90nm 8Mb STT MRAM demonstrator featuring trimmed, reference cell-based sensing J. DeBrosse,T. Maffitt,Yutaka Nakamura,Guenole Jan,Po-Kang Wang	2015	8
2	Feasibility of an active-read approach for spin-torque switched magnetic tunnel junctions in a random access memory Journal of Applied Physics ·J. Z. Sun,J. DeBrosse,Tao Yuchu	2013	2
3	A Study of Write Margin of Spin Torque Transfer Magnetic Random Access Memory Technology IEEE Transactions on Magnetics ·Tai Min,Qiang Chen,R. S. Beach,Guenole Jan,P. M Oayyedi,W. Kula,Terry Torng,Ayaa Zarm,Tom Zhong,Denny D. Tang,Tao Yuchu,Miroslav Pomezný,J. Z. Sun,J. DeBrosse,D. C. Worledge,T. Maffitt,W. J. Gallagher	2010	109
4	Design considerations for MRAM IBM Journal of Research and Development ·T. Maffitt,J. DeBrosse,Ndidiamka Patients Ukeje,Gloria Rojas Quintana,M. Lamorey,A.K. Kadirova,Patrick Pierce Boddie,Mark A. Wood,W. J. Gallagher	2006	58
5	A 16-Mb MRAM featuring bootstrapped write drivers IEEE Journal of Solid-State Circuits ·D. Gogl,Christine Arndt,심정석,Regine Ynez H De Mesa,J. DeBrosse,Gloria Rojas Quintana,H. Hoenigschmid,S. Lammers,M. Lamorey,Bagus Dwi Budiman,T. Maffitt,Maren Engelhardt,S. Yang,A Shaw,Deepanjali Gaur,Patrick Pierce Boddie,Mark A. Wood,W. J. Gallagher,Georg Mueller,Perera S	2005	40
6	A high-speed 128 Kbit MRAM core for future universal memory applications Regine Ynez H De Mesa,J. DeBrosse,D. Gogl,H. Hoenigschmid,R. P. Robertazzi,Christine Arndt,Daniel Braun,Vebjørn Moen,厚直堀内,S. Lammers,S. Yang,W. Reohr,Deepanjali Gaur,W. J. Gallagher,Georg Müller	2004	19
7	A High-Speed 128-kb MRAM Core for Future Universal Memory Applications IEEE Journal of Solid-State Circuits ·J. DeBrosse,D. Gogl,Regine Ynez H De Mesa,H. Hoenigschmid,R. P. Robertazzi,Christine Arndt,Daniel Braun,Vebjørn Moen,厚直堀内,S. Lammers,S. Yang,W. Reohr,Deepanjali Gaur,W. J. Gallagher,Georg Mueller	2004	50
8	A 16Mb MRAM featuring bootstrapped write drivers J. DeBrosse,Christine Arndt,بهادر فانی,Regine Ynez H De Mesa,D. Gogl,Gloria Rojas Quintana,H. Hoenigschmid,S. Lammers,M. Lamorey,Yuan Lü,T. Maffitt,Maren Engelhardt,Xin Chen,A Shaw,Deepanjali Gaur,Patrick Pierce Boddie,Imaduddin Usman Al Bantani,W. J. Gallagher,Georg Mueller,Perera S	2004	18
9	A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP) B. Liu,Charles W. Koburger,R. Schulz,J.D. Warnock,T. Furukawa,Marko Jošt,Y. Taur,Frank F. Gao,J. DeBrosse,M. A. B. Zinal Abidin,J. L. Mauer	2003	6
10	Flexible test mode design for DRAM characterization H.‐S. Philip Wong,T. Kirihata,J. DeBrosse,Yoshihiro Watanabe,T. Hara,Makoto Yoshida,M.R. Wordeman,Shosuke Fujii,Samradnyi Thorat	2002	1
11	A 286 mm/sup 2/ 256 Mb DRAM with X32 both-ends DQ Yoshihiro Watanabe,H.‐S. Philip Wong,T. Kirihata,Daiki Kato,J. DeBrosse,T. Hara,Makoto Yoshida,Hideo Mukai,K.N. Quader,Takeharu Nagai,Miguel Vazquez Antas,Libri Annisa Firdayasa Handoko,M.R. Wordeman,Shosuke Fujii	2002	0
12	Challenges and future directions for the scaling of dynamic random-access memory (DRAM) IBM Journal of Research and Development ·J. Mandelman,R.H. Dennard,G. Bronner,J. DeBrosse,R. Divakaruni,Y. Li,C. Radens	2002	183
13	Floating-body concerns for SOI dynamic random access memory (DRAM) J. Mandelman,J. Barth,J. DeBrosse,R.H. Dennard,E Lotterer,J. Gautier,H.I. Hanafi	2002	5
14	A 0.6 μm/sup 2/ 256 Mb trench DRAM cell with self-aligned BuriEd STrap (BEST) L. Nesbit,Fritz Larsen,Tone Melvær,J. DeBrosse,Anzel Veldman,M. Gall,Jeff Gambino,С. Собковскі,H. Ishiuchi,Seulgi Hong,J. Mandelman,Dirk J. Rodricks,Gjz,A. Nitayama,S. Parke,H.‐S. Philip Wong,G. Bronner	2002	6
15	A 7F/sup 2/ cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4-Gb DRAMs IEEE Journal of Solid-State Circuits ·H. Hoenigschmid,Alexander Frey,J. DeBrosse,T. Kirihata,Georg Mueller,RP Mann,(unknown),Txabi Arnal,YUKIO IMANISHI,David R. Hanson,Ibrahim Addai,Bing Ji,Jamie M. Knapil Infantolino,P.H.Th.J. Slee,C. Radens,Sinan A. Neftci,Hanna Venesvirta,Yuichi Kamiyoshi,Fritz Larsen,W. Weber,M.R. Wordeman	2000	3
16	A 220-mm/sup 2/, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture IEEE Journal of Solid-State Circuits ·T. Kirihata,D.O. Perkins,Kohji Hosokawa,J. A. Seherrer,M. Faraj,Maria Alice Setúbal Souza e Silva,O Shaba,Yuichi Kamiyoshi,J. DeBrosse,Hanna Venesvirta,D. A. Mitronin,V. Durante,M.R. Wordeman,RaviIndra CahyaKP	1998	3
17	Flexible test mode approach for 256-Mb DRAM IEEE Journal of Solid-State Circuits ·T. Kirihata,M. Faraj,J. DeBrosse,Yoshihiro Watanabe,T. Hara,Makoto Yoshida,M.R. Wordeman,Shosuke Fujii,Agarwal Ir,Samradnyi Thorat	1997	10
18	Fault-tolerant designs for 256 Mb DRAM IEEE Journal of Solid-State Circuits ·T. Kirihata,Yoshihiro Watanabe,M. Faraj,J. DeBrosse,Makoto Yoshida,Daiki Kato,Shosuke Fujii,M.R. Wordeman,Miguel Vazquez Antas,S. Parke,Agarwal Ir	1996	22
19	A 286 mm/sup 2/ 256 Mb DRAM with ×32 both-ends DQ IEEE Journal of Solid-State Circuits ·Yoshihiro Watanabe,M. Faraj,T. Kirihata,Daiki Kato,J. DeBrosse,T. Hara,Makoto Yoshida,Hideo Mukai,K.N. Quader,Takeharu Nagai,Miguel Vazquez Antas,王文英,M.R. Wordeman,Shosuke Fujii	1996	7
20	Planarization of ULSI Topography over Variable Pattern Densities Journal of The Electrochemical Society ·Justiniano Cordero S,J. DeBrosse,Charles W. Koburger,照夫近藤,Eva Reitenbach	1991	11

About J. DeBrosse

J. DeBrosse is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Atomic and Molecular Physics, and Optics, having authored 22 papers that have together received 602 indexed citations. Recurring topics across this work include Semiconductor materials and devices (11 papers), Magnetic properties of thin films (9 papers), Advancements in Semiconductor Devices and Circuit Design (7 papers), Low-power high-performance VLSI design (5 papers), Advanced Data Storage Technologies (5 papers), Integrated Circuits and Semiconductor Failure Analysis (3 papers), VLSI and Analog Circuit Testing (3 papers) and Advanced Memory and Neural Computing (3 papers). The work is most often cited by research in Hardware and Architecture (128 citations), Atomic and Molecular Physics, and Optics (249 citations) and Electrical and Electronic Engineering (457 citations). J. DeBrosse has collaborated with scholars based in United States, Japan and France. Frequent co-authors include R.H. Dennard, J. Mandelman, Y. Li, R. Divakaruni, G. Bronner, C. Radens, W. J. Gallagher, T. Maffitt, M. Lamorey and Mark A. Wood. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IBM Journal of Research and Development, IEEE Transactions on Magnetics, Journal of The Electrochemical Society and Journal of Applied Physics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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