J.D. Warnock

727 total citations
32 papers, 409 citations indexed

About

J.D. Warnock is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, J.D. Warnock has authored 32 papers receiving a total of 409 indexed citations (citations by other indexed papers that have themselves been cited), including 32 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 5 papers in Biomedical Engineering. Recurrent topics in J.D. Warnock's work include Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Low-power high-performance VLSI design (10 papers). J.D. Warnock is often cited by papers focused on Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Low-power high-performance VLSI design (10 papers). J.D. Warnock collaborates with scholars based in United States, India and Germany. J.D. Warnock's co-authors include C.J. Anderson, J.Y.-C. Sun, B. Krauter, J. Keaty, J. Clabes, C. J. Kircher, P.J. Restle, John G. Petrovick, Joachim N. Burghartz and J.H. Comfort and has published in prestigious journals such as Journal of Applied Physics, Journal of The Electrochemical Society and IEEE Journal of Solid-State Circuits.

In The Last Decade

J.D. Warnock

28 papers receiving 385 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
J.D. Warnock United States	11	373	86	37	37	32	32	409
M. Kinugawa Japan	11	649 1.7×	96 1.1×	28 0.8×	111 3.0×	35 1.1×	29	679
B. Kleveland United States	11	460 1.2×	47 0.5×	24 0.6×	52 1.4×	35 1.1×	24	480
R. Divakaruni United States	10	306 0.8×	82 1.0×	68 1.8×	35 0.9×	17 0.5×	35	358
Jae-Kyung Wee South Korea	10	275 0.7×	43 0.5×	34 0.9×	61 1.6×	51 1.6×	47	320
H. Oda Japan	12	466 1.2×	30 0.3×	12 0.3×	51 1.4×	24 0.8×	70	489
Jenn-Gang Chern United States	7	420 1.1×	23 0.3×	17 0.5×	66 1.8×	45 1.4×	13	436
Geoffrey Yeap United States	13	489 1.3×	68 0.8×	15 0.4×	30 0.8×	24 0.8×	48	508
Campbell Millar United Kingdom	14	567 1.5×	75 0.9×	16 0.4×	53 1.4×	26 0.8×	44	600
D. Deschacht France	8	257 0.7×	68 0.8×	11 0.3×	40 1.1×	43 1.3×	44	287
E. Hamdy United States	10	286 0.8×	101 1.2×	12 0.3×	28 0.8×	9 0.3×	34	305

Countries citing papers authored by J.D. Warnock

Since Specialization

Citations

This map shows the geographic impact of J.D. Warnock's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.D. Warnock with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.D. Warnock more than expected).

Fields of papers citing papers by J.D. Warnock

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.D. Warnock. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.D. Warnock. The network helps show where J.D. Warnock may publish in the future.

Co-authorship network of co-authors of J.D. Warnock

This figure shows the co-authorship network connecting the top 25 collaborators of J.D. Warnock. A scholar is included among the top collaborators of J.D. Warnock based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J.D. Warnock. J.D. Warnock is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Warnock, J.D., et al.. (2005). A double-precision multiplier with fine-grained clock-gating support for a first-generation CELL processor. 378–380. 8 indexed citations

Soyuer, M., J.D. Warnock, Ching-Te Chuang, et al.. (2005). Multi-GHz Monolithic Voltage-Controlled Oscillators In Advanced Silicon Bipolar Technology. 81–82.

Warnock, J.D.. (2004). Circuit design issues for the POWER4 chip. 32. 125–128. 1 indexed citations

Tzeng, Yih-Fong, et al.. (2003). A low-power static frequency divider circuit in bipolar technology. 163–165.

Koburger, Charles W., R. Schulz, J.D. Warnock, et al.. (2003). A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP). 61–64. 6 indexed citations

Jenkins, K.A., John D. Cressler, & J.D. Warnock. (2002). Use of electron-beam irradiation to study performance degradation of bipolar transistors after reverse-bias stress. 873–876. 4 indexed citations

Warnock, J.D., et al.. (2002). Sub-15 ps gate delay with new AC-coupled active pull-down ECL circuit. 136–138. 2 indexed citations

Warnock, J.D., J. Keaty, John G. Petrovick, et al.. (2002). The circuit and physical design of the POWER4 microprocessor. IBM Journal of Research and Development. 46(1). 27–51. 85 indexed citations

Warnock, J.D.. (1995). Silicon bipolar device structures for digital applications: technology trends and future directions. IEEE Transactions on Electron Devices. 42(3). 377–389. 19 indexed citations

10.

Lu, P.-F. & J.D. Warnock. (1994). Trench-proximity effects on collector current in self-aligned NPN and PNP bipolar transistors. Solid-State Electronics. 37(11). 1871–1875. 1 indexed citations

11.

Chuang, C.T., J.D. Warnock, & John D. Cressler. (1993). AC-coupled complementary push-pull ECL circuit with 34 fJ power-delay product. Electronics Letters. 29(22). 1938–1939. 2 indexed citations

12.

Kobeda, E., J. Gambino, G.L. Patton, et al.. (1993). Fabrication of Tungsten Local Interconnect for VLSI Bipolar Technology. Journal of The Electrochemical Society. 140(10). 3007–3013. 3 indexed citations

13.

Burghartz, Joachim N., J.Y.-C. Sun, C. Stanis, Sebastian Mäder, & J.D. Warnock. (1992). Identification of perimeter depletion and emitter plug effects in deep-submicrometer, shallow-junction polysilicon emitter bipolar transistors. IEEE Transactions on Electron Devices. 39(6). 1477–1489. 34 indexed citations

14.

Kobeda, E., et al.. (1992). Diffusion barrier properties of TiN films for submicron silicon bipolar technologies. Journal of Applied Physics. 72(7). 2743–2748. 9 indexed citations

15.

Soyuer, M. & J.D. Warnock. (1992). Multigigahertz voltage-controlled oscillators in advanced silicon bipolar technology. IEEE Journal of Solid-State Circuits. 27(4). 668–670. 11 indexed citations

16.

Chin, Ken K., C.T. Chuang, & J.D. Warnock. (1992). 12.8-ps 1.0-mW charge-buffered active pull-down NTL circuit. IEEE Journal of Solid-State Circuits. 27(11). 1648–1650. 2 indexed citations

17.

Lu, P.-F., et al.. (1991). The design and optimization of high-performance, double-poly self-aligned p-n-p technology. IEEE Transactions on Electron Devices. 38(6). 1410–1418. 10 indexed citations

18.

Harame, D.L., B.S. Meyerson, E.F. Crabbé, et al.. (1991). 55 Ghz Polysilicon-Emitter Graded Sige-Base Pnp Transistors. 71–72. 17 indexed citations

19.

Cressler, John D., T.-C. Chen, J.D. Warnock, D.D. Tang, & E.S. Yang. (1990). Scaling the silicon bipolar transistor for sub-100-ps ECL circuit operation at liquid nitrogen temperature. IEEE Transactions on Electron Devices. 37(3). 680–691. 10 indexed citations

20.

Chuang, Ching-Te, et al.. (1989). A 23-ps/2.1-mW ECL gate with an AC-coupled active pull-down emitter-follower stage. IEEE Journal of Solid-State Circuits. 24(5). 1301–1306. 23 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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