A. Virazel
- Hardware and Architecture top 0.5%
- VLSI and Analog Circuit Testing 163
-
- Integrated Circuits and Semiconductor Failure Analysis 130
- Semiconductor materials and devices 62
- Radiation Effects in Electronics 61
- Low-power high-performance VLSI design 60
- Advancements in Semiconductor Devices and Circuit Design 36
- VLSI and FPGA Design Techniques 20
- Advanced Memory and Neural Computing 17
- Software top 10%
- Control and Systems Engineering top 10%
- Co-authors
- Patrick GirardS. PravossoudovitchAlberto BosioLuigi DililloC. LandraultSimone BorriAida Todri‐SanialMarcello Traiola
In The Last Decade
A. Virazel
215 papers receiving 1.7k citations
Peers
Comparison fields: 5 of 42
- Hardware and Architecture 1.2k
- Electrical and Electronic Engineering 1.6k
- Software 42
- Computer Networks and Communications 82
- Control and Systems Engineering 67
Countries citing papers authored by A. Virazel
This map shows the geographic impact of A. Virazel's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by A. Virazel with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites A. Virazel more than expected).
Fields of papers citing papers by A. Virazel
This network shows the impact of papers produced by A. Virazel. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by A. Virazel. The network helps show where A. Virazel may publish in the future.
Co-authorship network
The 25 scholars most cited alongside A. Virazel, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 0 | |
| 2 | 2024 | 1 | |
| 3 | 2024 | 0 | |
| 4 | 2024 | 1 | |
| 5 | 2023 | 2 | |
| 6 | 2021 | 9 | |
| 7 | 2020 | 33 | |
| 8 | 2019 | 4 | |
| 9 | Can we Approximate the Test of Integrated Circuits? | 2017 | 7 |
| 10 | 2017 | 11 | |
| 11 | 2014 | 3 | |
| 12 | 2012 | 3 | |
| 13 | 2012 | 1 | |
| 14 | 2009 | 5 | |
| 15 | 2009 | 12 | |
| 16 | 2008 | 8 | |
| 17 | 2006 | 8 | |
| 18 | 2006 | 12 | |
| 19 | 2004 | 38 | |
| 20 | Delay fault testing : Effectiveness of random SIC and random MIC test sequence | 2001 | 6 |
About A. Virazel
A. Virazel is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Software, having authored 229 papers that have together received 1.7k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (163 papers), Integrated Circuits and Semiconductor Failure Analysis (130 papers), Semiconductor materials and devices (62 papers), Radiation Effects in Electronics (61 papers), Low-power high-performance VLSI design (60 papers), Advancements in Semiconductor Devices and Circuit Design (36 papers), VLSI and FPGA Design Techniques (20 papers) and Advanced Memory and Neural Computing (17 papers). The work is most often cited by research in Hardware and Architecture (1.2k citations), Electrical and Electronic Engineering (1.6k citations) and Software (42 citations). A. Virazel has collaborated with scholars based in France, Italy and Germany. Frequent co-authors include Patrick Girard, S. Pravossoudovitch, Alberto Bosio, Luigi Dilillo, C. Landrault, Simone Borri, Aida Todri‐Sanial, Marcello Traiola, Mario Barbareschi and F. Wrobel. Their work appears in journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Nuclear Science, Journal of Electronic Testing, Proceedings of the IEEE and Electronics.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.