Artur Jutman

648 total citations
81 papers, 462 citations indexed

About

Artur Jutman is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, Artur Jutman has authored 81 papers receiving a total of 462 indexed citations (citations by other indexed papers that have themselves been cited), including 77 papers in Hardware and Architecture, 63 papers in Electrical and Electronic Engineering and 15 papers in Control and Systems Engineering. Recurrent topics in Artur Jutman's work include VLSI and Analog Circuit Testing (74 papers), Integrated Circuits and Semiconductor Failure Analysis (43 papers) and Radiation Effects in Electronics (21 papers). Artur Jutman is often cited by papers focused on VLSI and Analog Circuit Testing (74 papers), Integrated Circuits and Semiconductor Failure Analysis (43 papers) and Radiation Effects in Electronics (21 papers). Artur Jutman collaborates with scholars based in Estonia, Germany and Sweden. Artur Jutman's co-authors include Sergei Devadze, Raimund Ubar, Jaan Raik, Erik Larsson, M. Sonza Reorda, Riccardo Cantoro, Heinz‐Dietrich Wuttke, Witold A. Pleskacz, Hans-Joachim Wunderlich and Viera Stopjaková and has published in prestigious journals such as IEEE Transactions on Industrial Electronics, Microelectronics Reliability and IEEE Instrumentation & Measurement Magazine.

In The Last Decade

Artur Jutman

72 papers receiving 428 citations

Peers

Artur Jutman
R. Rajsuman United States
John A. Nestor United States
Chia-Jeng Tseng United States
Mahesh A. Iyer United States
Larry Cooke United States
Lakshmi Reddy United States
Eric Felt United States
R. Rajsuman United States
Artur Jutman
Citations per year, relative to Artur Jutman Artur Jutman (= 1×) peers R. Rajsuman

Countries citing papers authored by Artur Jutman

Since Specialization
Citations

This map shows the geographic impact of Artur Jutman's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Artur Jutman with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Artur Jutman more than expected).

Fields of papers citing papers by Artur Jutman

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Artur Jutman. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Artur Jutman. The network helps show where Artur Jutman may publish in the future.

Co-authorship network of co-authors of Artur Jutman

This figure shows the co-authorship network connecting the top 25 collaborators of Artur Jutman. A scholar is included among the top collaborators of Artur Jutman based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Artur Jutman. Artur Jutman is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Ubar, Raimund, Jaan Raik, Maksim Jenihhin, & Artur Jutman. (2024). Structural Decision Diagrams in Digital Test.
2.
Devadze, Sergei, et al.. (2019). Ways for board and system test to benefit from FPGA embedded instrumentation. 1–10. 3 indexed citations
3.
Jutman, Artur, Erik Larsson, M. Sonza Reorda, et al.. (2017). BASTION: Board and SoC test instrumentation for ageing and no failure found. University of Twente Research Information. 115–120. 2 indexed citations
5.
Jutman, Artur, et al.. (2016). A suite of IEEE 1687 benchmark networks. Lund University Publications (Lund University). 1–10. 35 indexed citations
6.
Ubar, Raimund, et al.. (2011). SoC and Board Modeling for Processor-Centric Board Testing. 1149. 575–582. 4 indexed citations
7.
Ubar, Raimund, et al.. (2010). E-Learning Environment for WEB-Based Study of Testing. 2 indexed citations
8.
Ubar, Raimund, et al.. (2010). Structural fault collapsing by superposition of BDDs for test generation in digital circuits. 16. 250–257. 10 indexed citations
9.
Ubar, Raimund, et al.. (2009). Diagnozer: A laboratory tool for teaching research in diagnosis of electronic systems. 12–15. 2 indexed citations
10.
Devadze, Sergei, et al.. (2009). Fast extended test access via JTAG and FPGAs. 1–7. 12 indexed citations
11.
Ubar, Raimund, Sergei Devadze, Jaan Raik, & Artur Jutman. (2008). Parallel fault backtracing for calculation of fault coverage. Asia and South Pacific Design Automation Conference. 667–672. 10 indexed citations
12.
Wuttke, Heinz‐Dietrich, Raimund Ubar, Karsten Henke, & Artur Jutman. (2008). The synthesis level in Bloom’s Taxonomy — a nightmare for an LMS. 1. 199–204. 1 indexed citations
13.
Ubar, Raimund, et al.. (2007). Learning Digital Test and Diagnostics via Internet. Common Library Network (Der Gemeinsame Bibliotheksverbund). 3(1). 2 indexed citations
14.
Jutman, Artur, et al.. (2007). BIST analyzer: A training platform for SoC testing. 347. S3H–8. 2 indexed citations
15.
Jutman, Artur, et al.. (2006). LFSR Polynomial and Seed Selection Using Genetic Algorithm. 1–4. 8 indexed citations
16.
Jutman, Artur, et al.. (2005). A method for crosstalk fault detection in on-chip buses. 285–288. 2 indexed citations
17.
Jutman, Artur, et al.. (2003). Turbo Tester – diagnostic package for research and training. 11 indexed citations
18.
Raik, Jaan, Artur Jutman, & Raimund Ubar. (2003). Fast static compaction of tests composed of independent sequences: basic properties and comparison of methods. 2. 445–448. 1 indexed citations
19.
Jutman, Artur & Raimund Ubar. (2002). Design error localization in digital circuits by stuck-at fault test patterns. 2. 723–726. 1 indexed citations
20.
Jutman, Artur & Raimund Ubar. (2000). Design error diagnosis in digital circuits with stuck-at fault model. Microelectronics Reliability. 40(2). 307–320. 6 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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